New members of software development teams must come up-to-speed on a large amount of information before becoming productive, even if they have previous software development experience. Often, this knowledge is gained through mentoring: an experienced colleague monitors the newcomer’s progress on his or her first assigned tasks, and provides feedback and advice. The mentor is the person the newc...

Programmers want shared memory. They can get it on special-purpose multiprocessor architectures, but the speed of technological improvements makes it difficult for these architectures to compete with systems built from commodity parts. Shared-memory parallel programming on distributed systems is therefore an appealing idea, but it isn’t practical yet. Practicality will hinge on a prudent mix of...

Abstract NAND flash memory is one of the most aggressively scaled technologies among electronic devices recently. The massive increase in the capacity makes flash memory possible for enterprise applications, such as the database system. However, the characteristic of erase-before-write makes flash memory very challenging for the database management. A non-in-place update technique may be exploi...

The latest effective defense against code reuse attacks is fine-grained, per-process memory randomization. However, such process randomization prevents code sharing since there is no longer any identical code to share between processes. Without shared libraries, however, tremendous memory savings are forfeit. This drawback may hinder the adoption of fine-grained memory randomization. We present...

Nintendo’s Super Smash Bros. Melee fighting game can be emulated on modern hardware allowing us to inspect internal memory states, such as character positions. We created an AI that avoids being hit by training using these internal memory states and outputting controller button presses. After training on a month’s worth of Melee matches, our best agent learned to avoid the toughest AI built int...

We study the implementation of an actor language, OAL, on a massively parallel message-passing architecture: MEGA. Motivations and implementation constraints are exposed. A simulator has been built to investigate resource consumption. First results sbow the feasibility o f the implementation but indicates serious problems in memory usage. Load-balancing strategies are presented which partially ...

Analysis and simulation the existence of electrical memory effects and thermal memory effects in different spacing two-tone input signal and modulated signal source through advanced design system (ADS) software simulation, respectively. Built thermal memory effects compensation circuit in the ADS environment to confirm the compensation circuit has a good compensation to the thermal memory effec...

This paper describes the architecture of a new large multiprocessor computer system being built at CarnegieMellon University. The system allows close cooperation between large numbers of Inexpensive processors. All processors share access to a single virtual memory address space. There are no arbitrary limits on the number of processors, amount of memory or communication bandwidth in the system...

We present a calculus for establishing non-interference of several Java threads running in parallel. The proof system is built atop an implemented sequential Java Dynamic Logic calculus with 100% Java Card coverage. We present two semantic and one syntactic type of noninterference conditions to make reasoning efficient. In contrast to previous works in this direction, our method takes into full...