Minimal-interval semantics [5] associates with each query over a document a set of intervals, called witnesses, that are incomparable with respect to inclusion (i.e., they form an antichain): witnesses de ne the minimal regions of the document satisfying the query. Minimal-interval semantics makes it easy to de ne and compute several sophisticated proximity operators, provides snippets for user...

Most research investigating how the cognitive system deals with arithmetic has focused on the processing of two addends. Arithmetic that involves more addends has specific cognitive demands such as the need to compute and hold the intermediate sum. This study examines the intermediate sums activations in intentional and automatic calculations. Experiment 1 included addition problems containing ...

Power, speed and area are prime design constraints for portable electronics devices and signal processing applications. Multiplier plays an important role in DSP applications. In this paper, a low power and high speed multiplier with improved column bypassing scheme is presented. Primary power reduction is obtained by disabling the supply voltage of non-functional blocks when the operands of th...

Instruction set design is a crucial aspect of computer architecture. The requirements to fulfill have evolved along time. For superscalar processing the most important feature is to avoid code coupling caused by data dependencies. However, instruction sets may have particular characteristics that produce a negative impact into the amount of available parallelism for which it is important to ana...

Biases are commonly seen in numerical cognition. The operational momentum (OM) effect shows that responses to addition and subtraction problems are biased in the whole-number direction of the operation. It is not known if this bias exists for other arithmetic operations. To determine whether OM exists in scalar operations, we measured response bias in adults performing symbolic (Arabic digits) ...

Decimal computer arithmetic is experiencing a revived popularity, and there is quest for highperformance decimal hardware units. Successful experiences on binary computer arithmetic may find grounds in decimal arithmetic. For example, the traditional fully redundant (i.e., the result and both of the operands are represented in a redundant format) and semi-redundant (i.e., the result and only on...

Efficient modulo 2+1 adders are important for several applications including residue number system, digital signal processors and cryptography algorithms. In this paper we present a novel modulo 2+1 addition algorithm for a recently represented number system. The proposed approach is introduced for the reduction of the power dissipated. In a conventional modulo 2+1 adder, all operands have (n+1...

With the availability of ever increasing data, more sophisticated queries will take longer time, and more likely the statically-generated initial query processing plan will become suboptimal during execution. For example, selectivity estimates and main memory availability in the system may change during execution. These discrepancies cause additional I/O and thrashing that may seriously lengthe...

Multimedia extensions are nearly ubiquitous in today’s general-purpose processors. These extensions consist primarily of a set of short-vector instructions that apply the same opcode to a vector of operands. Vector instructions introduce a data-parallel component to processors that exploit instruction-level parallelism, and present an opportunity for increased performance. In fact, ignoring a p...

Efficient modulo 2+1 adders are important for several applications including residue number system, digital signal processors and cryptography algorithms. In this paper we present a novel modulo 2+1 addition algorithm for a recently represented number system. The proposed approach is introduced for the reduction of the power dissipated. In a conventional modulo 2+1 adder, all operands have (n+1...