With the growing demands of portable devices, it is necessary to pay attention low-power digital integrated designs. This paper proposes a MOS Current Mode Logic (MCML) design, termed as Hybrid Dynamic with modified current source (H-MDyCML). In H-MDyCML circuits, functions are realized using complementary pass transistor logic which helps overcome problem stacking transistors in multiple level...

Flip Flops are critical timing elements in digital systems which has large impact on circuit speed and power consumption. The performance of flip flop is an important parameter to determine performance of whole synchronous circuit. In this paper, comparison of existing flip flops with different parameters is calculated. A new design a low power pulse triggered flip-flop (FF) has been proposed h...

Adder cells using Gate Diffusion Technique (GDI) & PTL-GDI technique are described in this paper. GDI technique allows reducing power consumption, propagation delay and low PDP (power delay product) whereas Pass Transistor Logic (PTL) reduces the count of transistors used to make different logic gates, by eliminating redundant transistors. Performance comparison with various Hybrid Adder is bee...

A stochastic channel model for line-of-sight (LoS) street microcell scenarios in dense urban areas is proposed. The scattering power distribution (SPD) in the channel seen from the mobile terminal (MT) based on the physical phenomenon is obtained. The coefficients of the distribution are derived by approximation to the measurements performed in urban street microcell scenarios. The azimuth-powe...

In this paper a new low power and high performance adder cell using a new design style called “Bridge” is proposed. The bridge design style enjoys a high degree of regularity, higher density than conventional CMOS design style as well as lower power consumption, by using some transistors, named bridge transistors. Simulation results illustrate the superiority of the resulting proposed adder aga...

This paper illustrates that the application of the time reversal technique in multiple inputsingle output (MISO) communications systems can effectively limit the perceived delay spread of the channel. Fixed wireless access channels in the 5GHz band have been measured with 8 element uniform linear antenna arrays at both ends, thus providing an 8x8 MIMO configuration. The measurements were perfor...

A Sense Amplifier based flip-flop (SAFF) capable of operating unfailingly at wide voltage and temperature ranges is proposed in this work. The (FF) has a single ended latch design which results significant improvement power area requirements. modified sense amplifier along with enables robust low operation all variations the input data activity. SAFF developed 32nm CMOS technology, thorough con...

There is a recent boom being witnessed in emerging areas like IoMT (Internet of Medical Things), Artificial Intelligence for healthcare, and disaster management. These novel research frontiers are critical terms hardware cannot afford to compromise accuracy or reliability. Multiplier, one the most heavily used components, becomes crucial these applications. If optimized, multipliers can impact ...

This paper presents spatio-te1nporal channel statistics tabulated during a wideband peer-to-peer measurmnent campaign conducted on the campus of Virginia Tech. Based on over 2500 power-delay profile (PDP) snapshots 1nade at 12 different local area locations, the 1neasured statistics reveal trends about the spatio-tmnporal channel at microwave frequencies that will be particularly useful for des...

This article presents energy-efficient quaternary minimum and maximum logic circuits based on carbon nanotube field-effect transistor (CNTFET). The specific features of CNTFET, such as the possibility of determining the desired threshold voltages which are obtained by acquiring suitable diameters for carbon nanotubes, facilitate designing efficient circuits with multiple threshold voltages. The...