This paper describes a clock and data recovery (CDR) circuit that supports dual data rates of 2.7Gbps and 1.62Gbps for DisplayPort standard. The proposed CDR has a dual mode voltage-controlled oscillator (VCO) that changes the operating frequency with a “Mode” switch control. The chip has been implemented using 0.18μm CMOS process. Measured results show the circuit exhibits peak-to-peak jitters...

Disaster scenarios require different recovery solutions such as evacuation guidance, to perform the right action for wounded persons and efficiency diffuse useful alert for locating trapped survivors. These latter are constrained mainly by the infrastructure-less environment caused by the disaster damage (e.g. storm, earthquake). Exploiting opportunistic communications to design recovery soluti...

For recent years, disaster response management is considered as a promising field for applying methods and tools from business process management. Especially the development of adaptive workflow management systems (WfMS) brought a process-oriented management of highly dynamic disaster response processes (DRP) within tangible reach. However, time criticality, unpredictability or complex and chan...

This paper describes the design and fabrication of a clock and data recovery circuit (CDR). We propose a new clock and data recovery which is based on a 1/4-rate frequency detector (QRFD). The proposed frequency detector helps reduce the VCO frequency and is thus advantageous for high speed application. The proposed frequency detector can achieve low jitter operation and extend the pull-in rang...

A new and simple bit transition detection technique for non-return-to-zero (NRZ) signals is described. The bit transition detector uses MOSFET transistor’s nonlinearity to extract return-to-zero (RZ) signals from NRZ signals. The resulting RZ signals can be used for injection-locking an oscillator, performing clock synchronization. A 10Gbps injection-locked clock and data recovery (CDR) circuit...

When planning and modeling disaster response processes (DRP), the unpredictability of disasters precludes accounting for all eventualities in advance. DRPs are thus typically concretized and adapted after the disaster and during the process’s run-time. Since time is critical and uncertainty typical, planning of DRPs requires methods and tools that support disaster managers in process analysis, ...

The second generation of a competitive ELISA for prolamin quantification based on the R5 antibody was studied for method performance and suitability to detect partially hydrolyzed prolamins in food. To be able to convert signal intensities to gluten concentrations, as required by the Codex Alimentarius Standard, a new calibrator consisting of a peptic-tryptic digest of wheat, rye, and barley pr...

The London 2012 Olympics were the first Games with a legacy plan already in execution well before the beginning of the event. This study aims at evaluating the legacies of this Olympic edition, with particular regard to the new public open spaces created and their sustainability. The research carries out a post-occupancy evaluation of the Queen Elizabeth Olympic Park, which is the main output o...

Partial-Order Causal Link planners typically take a “least-commitment” approach to some decisions (notably, step ordering), postponing those decisions until constraints force them to be made. However, these planners rely to some degree on early commitments in making other types of decisions, including threat resolution and operator choice. We show why existing planners cannot support full least...

Teaching methodologies and uses of competitive intelligence and competitive technical intelligence in countries where the culture and the technological level are very different from the western world cannot be implemented without a cultural understanding of the tacit local knowledge and cultural behavior of people. As an example of research-action, we have chosen two Indonesian regions: Sulawes...