A multi-output second generation current conveyor (MOCCII), that can be used to realized first, second and third generations current conveyors, is proposed. The MOCCII consists of a CMOS differential stage for the voltage input, push-pull stage and the improved cascode current mirrors for the current output. Feedback techniques are proposed in order to provide a voltage gain of 0.991, a current...

Abstract: A CMOS LNA using MEMS Technology. Highlighting the "on-chip" inductors with quality factor used to replace previous off chip models. The operating frequency fo=2.4GHz with power dissipation of 20mW and overall noise figure of less than 1dB . It achieves an input return loss S11=-37.7dB. With a supply voltage of Vdd=2.7V giving out S21=24.3dB, S12= 40.7dB, and S22=-30dB. Cascode topolo...

We report traveling-wave amplifiers having 1–112 GHz bandwidth with 7 dB gain, and 1–157 GHz bandwidth with 5 dB gain. A third amplifier exhibited 5 dB gain and a 180GHz high-frequency cutoff. The amplifiers were fabricated in a 0.1m gate length InGaAs/InAlAs HEMT MIMIC technology. The use of gate-line capacitive-division, cascode gain cells and low-loss elevated coplanar waveguide lines have y...

A detailed introduction to published analogue circuit design techniques using Si and Si/SiGe FET devices for very low power applications is presented in this review. The topics discussed include subthreshold operation in FET devices, micro-currentmirrors and cascode techniques, voltage level-shifting and class-AB operation, the bulk-drive approach, the floating-gate method, micropower transcond...

This paper presents a new compensation method for fully differential two-stage CMOS operational transconductance amplifiers (OTAs). It employs a hybrid cascode compensation scheme, merged Ahuja and improved Ahuja style compensations, for fast settling. A design procedure for minimum settling time of the proposed compensation technique for a two-stage class A/AB OTA is described. To demonstrate ...

The design of a two-stage differential cascode power amplifier (PA) for 81-86 GHz E-band applications is presented. The PA was realised in SiGe technology with fT/fmax 170/250 GHz. A broadband transformer with efficiency higher than 79.4% from 71 GHz to 96 GHz is used as a BALUN. The PA delivers a 4.5 dBm saturated output power and exhibits a 13.4 dB gain at 83.6 GHz. The input and output retur...

Introduction p1 1 Background p2 a) The EKV MOS Model Formulation and Usage p2 b) The Switched Current Memory Cell Principle p4 2 Tips on selecting simulator parameters for a discrete-time simulation p6 3 Example 1Regulated Cascode Memory Cell (saturated) p6 4 Example 2 SI track-and-hold cell, weak/moderate inversion p8 5 Issues on higher-level modeling p11 6 Conclusions p11 7 References p11

The problems resulting from the use of nano-MOSFETs in design operational trans-conductance amplifiers (OTAs) lead to an urgent need for new techniques produce high-performance metrics OTAs suitable very high-frequency applications. In this paper, enhancement and equations proposed single-stage folded-cascode (FCOTA) are presented its various performance metrics. FCOTA adopts (FC) current sourc...

In this paper, we investigate the concept of unconditional transfer within various forms of regulated grammars like programmed grammars, matrix grammars, grammars with regular control, grammars controlled by bicoloured digraphs, periodically time-variant grammars and variants thereof, especially regarding their descriptive capacity both as language generating and as language accepting devices. ...