The cascode NMOS architecture has been tested by the Human Body Model (HBM), Machine Model (MM) and Transmission Line Pulse Generator (TLP) in this paper. For the TLP, detailed silicon data have been analyzed well in many parameters, such as the first triggeringon voltage (Vt1), the first triggering-on current (It1), the holding voltage (Vh), and the TLP I-V curve. Besides the above three kinds...

A cascode CMOS low noise amplifier (LNA) is presented along with the used design methodology and measurement results. The LNA works at 2.4 GHz with 14.5 dB voltage gain and 2.8 dB simulated noise figure (NF). Powered from a 1.8 V supply, the core measured current consumption is 2.76 mA. An output buffer was designed to match a 50 Ω load and its current consumption is 5.5 mA. The technology used...

By Aalay Kapadia in Electrical Engineering and Electronic Engineering. The circuit topology we used for this project is a cascode LNA with inductive source. Typical parameters are maximum transducer gain, output power , low noise, circuit stability. Here a LNA is designed to obtain an optimum gain with minimum.

A current mirror (CM) based on self cascode arrangement, useful for low voltage analog and mixed mode circuit is proposed. The CM uses 4 MOSFETs, has high input and output swing, operating at ± 0.5 V supply. Pspice simulations confirm the high performance of this CM having a bandwidth of 2.1 GHz. Resistive and capacitive compensations result in about threefold bandwidth increase to 6.1 GHz.

In this work, the factors affecting breakdown voltage of Si-GaN monolithic heterogeneous integrated Casccode FET fabricated by transfer printing were investigated. These two are avalanche resistance Si device and thickness SiN electrical isolation layer. Two kinds structures, MOSFET laterally-diffused (LDMOSFET), designed to study effect devices on characteristics Cascode FET. The layer was ana...

This paper presents a Class-D outphasing RF Power Amplifier (PA) which can operate at a 5.5 V supply and deliver +32 dBm at 1.85 GHz in a standard 130nm CMOS technology. The PA utilizes four on-chip transformers to combine the outputs of eight Class-D stages. The Class-D stages utilize a cascode configuration, driven by an AC-coupled low-voltage driver, to allow a 5.5 V supply in the 1.2/2.5 V ...

Tower mounted amplifiers (TMA) serve to lower the system noise figure (NF) in cellular base-stations. For performance reasons, the TMA is located as near to the receiving aerial as practical and has to be connected to the rest of the radio at the tower’s base by a long run of coaxial cable. The parameters critical to TMA performance are low NF for reasons of optimizing coverage area, high gain ...

Several state-of-the-art wireless receiver architectures are presented including the traditional superheterodyne, the image-reject heterodyne, the direct-conversion, and the very-low intermediate frequency (VLIF). The case studies are followed by a detailed view of receiver building blocks: lownoise amplifiers (LNA), mixers, and voltage-controlled oscillators (VCO). Two popular topologies curre...