نتایج جستجو برای: rs flip flop

تعداد نتایج: 39954  

2010
Takumi OKUHIRA Tohru ISHIHARA

Since the clock power consumption in today’s processors is considerably large, reducing the clock power consumption contributes to the reduction of the total power consumption in the processors. Recently, a gated flip-flop is proposed for reducing the clock power consumption of flip-flop circuits. The gated flip-flop employs a clock-gating circuit which cuts off an internal clock signal if the ...

2009
BALJIT KAUR

Low power design is most required now a days due to scaling down the technology where minimizing the voltage level is the most effective way to minimize the power consumption. This paper presents a double pulse flip flop implemented using 0.18 μm technology. The proposed flip flop avoids unnecessary switching and stacking of transistors and thus consume less power as compared to conventional fl...

Journal: :Stochastic Models 2022

Flip-flop processes refer to a family of stochastic fluid which converge either standard Brownian motion (SBM) or Markov modulated (MMBM). In recent years, it has been shown that complex distributional aspects the univariate SBM and MMBM can be studied through limiting behavior flip-flop processes. Here, we construct two classes bivariate whose marginals strongly SBMs are dependent on each othe...

Journal: :Journal of pharmacy & pharmaceutical sciences : a publication of the Canadian Society for Pharmaceutical Sciences, Societe canadienne des sciences pharmaceutiques 1998
H Boxenbaum

In the analysis of extra-vascular plasma concentration-time profiles, the disentanglement of influences from disposition and absorption rate influences is often challenging. This can be particularly true when absorption is considerably slower than disposition, that is, in a “flip-flop” system. The purpose of this communication is to define a pharmacokinetic flip-flop system (in a linear system)...

2014

Gain Clamped Semiconductor Optical Amplifier (GC-SOA), All Optical flip flop (AOff), Distributed bragg reflector (DBR), bistability property ABSTRACT In this article, the effect of coupling coefficient variations on an all optical Flip Flop performance based on gain clamped semiconductor optical amplifier according to distributed bragg reflectors by extensive band model of wave diffusion in tim...

Journal: :Neuron 1995
Kathryn M Partin Derek Bowie Mark L Mayer

The flip and flop splice variants of AMPA receptors show strikingly different sensitivity to allosteric regulation by cyclothiazide; heteromers assembled from GluR-A and GluR-B also exhibit splice variant-dependent differences in efficacy for activation by glutamate and kainate. The sensitivity for attenuation of desensitization by cyclothiazide for homomeric GluR-A was solely dependent upon ex...

2009
Rita Lovassy László T. Kóczy László Gál

In our previous work we proposed a Multilayer Perceptron Neural Networks (MLP NN) consisting of fuzzy flipflops (F3) based on various operations. We showed that such kind of fuzzy-neural network had good learning properties. In this paper we propose an evolutionary approach for optimizing fuzzy flip-flop networks (FNN). Various popular fuzzy operation and three different fuzzy flip-flop types w...

Journal: :Physical review letters 2001
K Hata Y Sainoo H Shigekawa

The dynamics of the flip-flop motion of single buckled dimers of Si(100) was elucidated by locating the tip of a scanning tunneling microscope over a single flip-flopping dimer and measuring the tunneling current (time trace). Based on a statistical analysis of the time trace, we succeeded in estimating the activation energy and the energy splitting between the two stable configurations of buck...

2013
Shipra Upadhyay Amit Shukla

Submitted: Jan 13, 2013; Accepted: Feb 26, 2013; Published: Aug 18, 2013 Abstract: This paper presents the design and performance evaluation of a modified complementary energy path adiabatic logic (MCEPAL) circuit. A simulative investigation on the proposed MCEPAL based, multiplexer, JK flip flop and 3 bit counter has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technolog...

2014
S. Sameena

The clock distribution network in digital integrated circuits distributes the clock signal which acts as a timing reference controlling data flow within the system. Since the clock signal has highest capacitance and operates at high frequencies, the clock distribution network consumes a large amount of total power in synchronous system. So, a new flip-flop is proposed in a low-swing resonant cl...

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