* Corresponding author Power Electronics Laboratory Department of Electrical and Computer Engineering Ben-Gurion University of the Negev P. O. Box 653 Beer-Sheva 84105, ISRAEL Phone: +972-8-646-1561; Fax: +972-8-647-2949; Email: [email protected] Website: www.ee.bgu.ac.il/~pel Central Research & Services Laboratories Fluorescent Systems Laboratory OSRAM SYLVANIA 71 Cherry Hill Dr. Beverly, MA 0...

A macro-model is a simplified model that emulates functional characteristics of a device or circuit, and widely used in system-level simulation. In this paper, macro-model based SPICE simulation of DC/DC switching regulators is presented. Macro-models of a power switch and Pulse Width Modulation (PWM) control circuit are described. Two simulation examples are given to demonstrate the capability...

Logic Cell modeling is an important component in the analysis and design of CMOS integrated circuits, mostly due to nonlinear behavior of CMOS cells with respect to the voltage signal at their input and output pins. A current-based model for CMOS logic cells is presented which can be used for effective crosstalk noise and delta delay analysis in CMOS VLSI circuits. Existing current source model...

This paper describes the current status of the SPICE research project that is investigating the transfer of best practice from the I.T. industry to the construction industry. The research focuses specifically on the improvement of business processes and in particular the use of the Capability Maturity Model (CMM). This model provides an evolutionary step-wise framework for process improvement a...

Recently, there has been great progress in the fabrication of various nano-devices utilizing silicon ULSI processing techniques [1]. Reliable room temperature operations have been demonstrated in a silicon single-electron quantum-dot transistor [2], a silicon selfassembled quantum-dot transistor [3], and various types of single-electron memory cells [4,5]. However, these single electron or quan...

Through-Silicon Via (TSV) is a critical interconnect element in 3D integration technology. TSVs introduce many new design challenges. In addition to competing with devices for real estate, TSVs can act as a major noise source throughout the substrate. We present in this paper a comprehensive study of TSV-induced noise as a function of several critical design and process parameters including sub...

In this research, the probabilistic model of the random variations in nanoscale MOSFET’s high frequency performance defined in term of variation in gate capacitance, has been proposed. Both random dopant fluctuation and process variation effects which are the major causes of the MOSFET’s high frequency characteristic variations have been taken into account. The nanoscale MOSFET equation has bee...