Routers and switches operating at high link rate require large and fast packet buffers. In many cases the buffers store cells from different queues which are requested by an arbiter. Such buffers can be built with slow but low cost DRAM coupled with fast but expensive SRAM. The heads and tails of the queues reside in SRAM, while the rest of the queues are stored in DRAM. Periodically a Memory M...

While non-volatile memories (NVMs) provide high-density and low-leakage, they also have low write-endurance. This, along with the write-variation introduced by the cache management policies, can lead to very small cache lifetime. In this paper, we propose ENLIVE, a technique for ENhancing the LIfetime of non-Volatile cachEs. Our technique uses a small SRAM (static random access memory) storage,...

In this paper we propose a novel design of a low power static random access memory (SRAM) cell for high-speed operations. The model adopts the voltage mode method for reducing the voltage swing during the write operation switching activity. Dynamic power dissipation increases when the operating frequency of the SRAM cell increases. In the proposed design we use two voltage sources connected wit...

Ternary content-addressable memory (TCAM) is often used in high speed search intensive applications such as ATM switch, IP filters. Hence, currently ZTCAM, is introduced which emulates the TCAM functionality with SRAM. It has some drawbacks such as low scalability, low storage density, slow access time and high cost. But this paper proposes novel memory architecture of existing Z-TCAM, but with...

Processors used in wireless and ad hoc networks bring more strict requirements on performance and power consumption. The hardware and software need to coordinate more efficiently to meet such requirements. With the rapid development of semi-conductor technology, more memory can be integrated into the processor. ScratchPad Memory (SPM) is a kind of the on-chip memory, is a SRAM based memory with...

Embedded SRAM is involved in many low-energy applications, e.g. stand-alone wireless sensor nodes. SRAMs have the highest energy contribution in such applications. Unlike dynamic RAM, it does not need to refresh. In modern Trends, the demand for memory has been increases tremendously. We analyze Schmitt-Trigger (ST)-based static random access memory (SRAM) bitcells for ultralow-voltage operatio...

This paper introduces a static multi-level memory cell that was conceived to store state variables in neuromorphic onchip learning applications. It consists of a capacitance that holds a voltage and an array of ‘fusing’ amplifiers that are connected as followers. These followers drive their output towards the voltage level of the input like normal followers, but only if the difference between i...

The major bottleneck in the performance of routers is the address lookup for determining the next hop address. The problem of determining the next hop is made more complicated by the fact that routers store variable length prefixes in the forwarding tables. This paper describes a new hardware algorithm that gives a fast and efficient solution for address lookups. As implemented in the forwardin...

This paper comparatively analyzes the static random-access memory (SRAM) cell designs for fault tolerance. Since SRAM cells are sensitive to radiation-induced single event upsets, various circuit-level approaches have been applied. Compared conventional circuits, one possibility is adding redundant storage nodes by means of additional transistors. The strength and weakness in terms performance ...