Abstract Herein, the direct growth of polar orthorhombic phase in Hf 0.5 Zr O 2 (HZO) thin films is reported using Pulsed Laser Deposition (PLD). The HZO onto a preheated (700 °C) silicon substrate mimics rapid thermal annealing, which allows formation smaller crystallites (~9.7 nm) with large surface energy leading to stabilization metastable phase. Unlike atomic layer deposition (ALD) HZO, PL...

This paper presents a new ?-Ga2O3 Junctionless double gate Metal-Oxide-Field-Semiconductor-Effect-Transistor (?DG-JL-FET) with an embedded P+ packet at the oxide layer (PO-?DG-JL-FET) for high-frequency applications. Our goal is to achieve efficient volume depletion region by placing of silicon. We show that proposed structure has subthreshold swing ? 64 mV/decade. It suppressed band-to-band tu...

Isotropic TFT characteristics are realized in the {100}-oriented grain-boundary-free 60 nm thick Si film obtained by continuous-wave laser lateral crystallization, where grain- and sub-boundaries defined as crystallographic boundaries having misfit angles of θ > 15° < 15°, respectively. Sub-boundaries observed parallel to scan directions; were 5–10° sub-boundary density was 0.02956 μm−1. ...

Over the last decades, the continuous down-scaling of metal-oxide-semiconductor field-effect transistors (MOSFETs) enabled faster and more complex chips while at the same time the space and power-consumption was kept under control. However, in the future, the further reduction of the power consumption per unit area will be restricted by a fundamental limit of the inverse subthreshold swing of M...

The p-i-n carbon nanotube (CNT) devices suffer from low ON/OFF current ratio and small saturation current. In this paper by band bending engineering, we improved the device performance of p-i-n CNT field effect transistors (CNTFET). A triple gate all around structure is proposed to manage the carrier transport along the channel. We called this structure multi-segment gate (MSG) CNTFET. Band to ...

This paper presents a compact model for organic thin-film transistors fabricated in the staggered or coplanar device architecture which includes short-channel effects related to potential barrier channel region, manifest themselves as threshold voltage roll-off, drain-induced lowering, and subthreshold swing degradation. Furthermore, effect of non-linear injection due work-function mismatch bet...

This work investigates the S-curve engineering by exploiting anti-ferroelectric (AFE)/ferroelectric (FE) stack negative-capacitance FinFET (NC-FinFET) to improve both subthreshold swing and ON-state current ( I ON ). The capacitance matching performance are evaluated using a short-channel AFE/FE...

In this paper, we propose and validate a novel design for a double-gate tunnel fi eld-effect transistor (DG Tunnel FET), for which the simulations show significant improvements compared with single-gate devices using an SiO2 gate dielectric. For the fi rst time, DG Tunnel FET devices, which are using a high-κ gate dielectric, are explored using realistic design parameters, showing an ON-current...