1.1 The VLSI Verification Problem Verification of integrated circuit design is a process that checks the implementation of the design against its specification and identifies design bugs. The view that design verification is subservient to design implementation has soon become invalid when designs become just moderately complex. It has been claimed that the verification complexity is growing at...

This paper includes off line Signature Verification (SV) process with test results using the proposed algorithm Particle Swarm Optimization-Neural Network (PSO-NN) together with statistical analysis, Chi-square test. The verification process is performed in four steps. Signature images are scanned (data acquisition) and image processing is applied to make images suitable for extracting features...

Lack of interoperability among enterprise applications has become the biggest impediment to their seamless integration. Although inter-enterprise applications are carefully designed and implemented, a close verification on whether they interoperate should be performed before their deployment. Application developers must be able to effectively identify and correct the problem sources of non-inte...

Galois field arithmetic is a critical component in communication and security-related hardware, requiring dedicated arithmetic circuit architectures for greater performance. In many Galois field applications, such as cryptography, the datapath size in the circuits can be very large. Formal verification of such circuits is beyond the capabilities of contemporary verification techniques. This pap...

Our work on narrowing the gap between verification and systematic testing has two directions: (1) complementing verification with systematic testing, and (2) pushing systematic testing toward reaching verification. In the first direction, we explore how to effectively combine static analysis with systematic testing, so as to guide test generation toward properties that have not been previously ...

In this article we give an overview of tool-based verification of hardand software systems and discuss the relation between verification and logical reasoning. By verification we mean reasoning-based methods to establish dependability. This is not restricted to proofs of functional correctness but includes also other scenarios such as test generation or bug finding. We describe the main verific...