electrical, structural and morphological properties of ni silicide films formed in ni(pt 4at.% )/si(100) and ni0.6si0.4(pt4at.% )/si(100) structures at various annealing temperatures ranging from 200 to 1000 oc were studied. the ni(pt) and ni0.6si0.4(pt) films with thickness of 15 and 25 nm were deposited by rf magnetron co-sputtering method, respectively.  the annealing process of the structur...

In this paper, a Temperature Parallel Simulated Annealing with Adaptive Neighborhood (TPSA/AN) for continuous optimization problems is introduced. TPSA/AN is based on the temperature parallel simulated annealing (TPSA), which is suitable for parallel processing, and the SA that Corana developed for continuous optimization problems. The moves in TPSA/AN are adjusted to have equal acceptance rate...

The formation of arsenic and phosphorus junctions is an important process step in modern device fabrication. The accurate prediction of the vertical and lateral profile is crucial for optimization of the device behavior and reliability. Experimental data show that the damage from implantation of the dopant species has an important and controlling effect on the final profile during low-temperatu...

Contrary to conventional belief, it turns out that in some problem instances of moderate size, fixed temperature simulated annealing algorithms based on a heuristic formula for determining the optimal temperature can be superior to algorithms based on cooling. Such a heuristic formula, however, often seems elusive. In practical cases considered we include instances of traveling salesman, quadra...

Simulated annealing with a more complicated set of moves than single-spin flips is applied to the one-dimensional Ising spin glass. The explicit connection between the residual entropy at T = 0 in the simulated annealing and the number of metastable states, found previously for single-spin flips, is shown to be also true for these more complicated moves. This result together with a zero-tempera...

Power density of microprocessors is increasing with every new process generation resulting in higher maximum chip temperatures. The high temperature of the chip greatly affects its reliability, raises the leakage power consumed to unprecedented levels, and makes cooling solutions significantly more expensive. The maximum temperature of a block in a chip depends not only on its own power density...

The classical version of simulated annealing is based on a cooling schedule. Generally, the initial temperature is set such that the acceptance ratio of bad moves is equal to a certain value χ0. In this paper, we first propose a simple algorithm to compute a temperature which is compatible with a given acceptance ratio. Then, we study the properties of the acceptance probability. It is shown th...

double layer zno/sno2 thin film resistive gas sensors were fabricated by successive pvd of those oxides onto porcelain substrates. the metallic contacts were provided by electron beam evaporation of platinum onto substrates prior to deposition of the gas sensitive layers. deposits were thermally annealed at different temperatures. it was shown that the activation energy of electrical conduction...

a low carbon al-killed ti-added steel was produced in mobarakeh steel complex in iran. mechanical properties and microstructural characterizations of steel in the as-cast, hot-rolled, cold-rolled and annealed conditions are presented. dilatometery tests were carried out to measure the finishing and annealing temperatures of steel. it was found that the addition of small amounts of ti increased ...

Planar superstrate CuInS2 (CIS) solar cell devices are fabricated using totally solution-processed deposition methods. A titanium dioxide blocking layer and an In2S3 buffer layer are deposited by the spray pyrolysis method. A CIS2 absorber layer is deposited by the spin coating method using CIS ink prepared by a 1-butylamine solvent-based solution at room temperature. To obtain optimum annealin...