Three approaches to the problem of testing synchronous data-flow programs written in LUSTRE are presented. LUSTRE is a language well-adapted to both the specification and the development of reactive software. The first approach automatically transforms a set of LUSTRE invariant properties characterizing the environment of the reactive program into a constrained random generator of test data seq...

Test development has been known as a tedious and time-consuming process. For complex designs, the process can sometime stretch over several months and become a bottleneck for product time-to-market. In the past two decades, various test development automation tools have been introduced and gradually accepted by designers and test engineers to automate dozens of tasks that are essential for deve...

A method for testing multi-protocol implementation under test (IUT) with a single test suite has been proposed in the literature. It tests a multi-protocol IUT in an integrated way compared to the conventional method, where single-layer test method and single-layer embedded test method are applied separately to the upper layer protocol and lower layer protocol, respectively. However, it did not...

Physically-aware N-detect (PAN-detect) test improves defect coverage by exploiting defect locality. This paper presents physically-aware test selection (PATS) to efficiently generate PAN-detect tests for large industrial designs. Compared to traditional N-detect test, the quality resulting from PAN-detect is enhanced without any increase in test execution cost. Experiment results from an IBM in...

In this paper we are giving an overview of automatic test data generation. The basic objective of this paper is to acquire the basic concepts related to automated test data generation research. The different implementation techniques are described with their relative merits and demerits. The future challenges and problems of test data generation are explained. Finally we describe the area where...

A symbolic fault simulator is integrated in a Genetic Algorithm (GA) environment to perform Automatic Test Pattern Generation (ATPG) for synchronous sequential circuits. In a two phase algorithm test length and fault coverage as well are optimized. However, there are circuits with bad random testability properties, that are also hard to test using genetically optimized test patterns. Thus, dete...

Hierarchy is key to managing design complexity. A hierarchical design system needs to maintain many views of the same design entity. Some of the examples might be physical view for placement, routing and extraction; transistor schematic view for circuit simulation, timing characterization and noise analysis; a gate level schematic view for timing, ver$cation, logic simulation, fault simulation ...

In order to prevent ground bounce, Automatic Test Pattern Generation (ATPG) algorithms for wire interconnects have recently been extended with the capability to restrict the maximum Hamming distance between any two consecutive test patterns to a user-defined integer, referred to as Simultaneously-Switching Outputs Limit (SSOL). The conventional approach to meet this SSOL constraint is to insert...

This paper presents automatic test case generation technique. Multi population genetic algorithm is used to generate test cases. Fitness function is based on the multiple condition decision coverage criteria. MATLAB Gatool is used for implementing the test case generation algorithm. It generates efficient and effective test cases. Test cases are optimized using multi population genetic algorith...

This paper deals with the automatic test pattern generation (ATPG) technique at the higher level using a functional fault model and defect-fault relationship in the form of a defect coverage table at the lower level. The paper contributes to test pattern generation (TPG) techniques taking into account physical defect localisation. A new parameter––probabilistic effectiveness of input patterns––...