The Cu2ZnGe X Sn1-X S4 (CZGTS) thin-film solar cells have a limited open-circuit voltage (V OC) due to bulk and interface recombination. Since the standard CdS buffer layer gives significant cliff-like conduction band offset CZGTS, alternative layers are needed reduce This work compares performance of wide bandgap Cu2ZnGeS4 (CZGS) fabricated with nontoxic Zn x Sn1–x O y (ZTO) grown by atomic de...

This study proposes a linearity-enhanced time-domain complementary metal-oxide semiconductor (CMOS) thermostat with process-variation calibration for improving the accuracy, expanding the operating temperature range, and reducing test costs. For sensing temperatures in the time domain, the large characteristic curve of a CMOS inverter markedly affects the accuracy, particularly when the operati...

This paper discusses operation characteristics of discontinuous current mode (DCM) for an ac-dc isolated converter on-board battery chargers electric vehicles. The discussed in this consists a front-end diode- bridge rectifier, active energy buffer, and dual-active-bridge dc-dc converter. buffer circuit absorbs the power pulsation from single-phase ac line into small-rated capacitor, thus, make...

The peak voltage depending on the load current can be affected by external capacitors installed in output stage of LDO regulator. However, capacitor-less regulator proposed this study was applied a driving buffer structure between error amplifier and path transistor. Therefore, maintained stable regardless controlling an effective overshoot/undershoot voltage. In addition, has built-in LVTSCR b...

This paper examines the electrical design of FPGA interconnect circuitry. We explore the circuit design of pass transistor and tri-state buffer routing switches, determine which transistor sizing, metal width and metal spacing are best for FPGA interconnect, and show that FPGA interconnect should be electrically heterogeneous-some (~20%) of the routing tracks should be designed for maximum spee...

This paper examines the electrical design of FPGA interconnect circuitry. We explore the circuit design of pass transistor and tri-state buffer routing switches, determine which transistor sizing, metal width and metal spacing are best for FPGA interconnect, and show that FPGA interconnect should be electrically heterogeneous-some (~20%) of the routing tracks should be designed for maximum spee...

A new CMOS current readout structure for the infrared (IR) focal-plane-array (FPA), called the buffered gate modulation input (BGMI) circuit, is proposed in this paper. Using the technique of unbalanced current mirror, the new BGMI circuit can achieve high charge sensitivity with adaptive current gain control and good immunity from threshold-voltage variations. Moreover, the readout dynamic ran...

Congestion and admission control are two of the most widely investigated problems which must be faced in ATM. The FBR (Fast Buffer Reservation), i.e. a virtual circuit acceptance algorithm proposed by Turner [Tur 921, based on the excess probability criterion (EPC), seems to be a complete approach for bandwidth management. It will constitute the starting point of the new admission and congestio...