In this paper, we present a low power 12 bit 5 MSPS, successive approximation converter architecture using pipeline technique. The converter consumes 4 mW at the Nyquist rate input with 1.8 V power supply. By combination of pipeline and successive architecture, the entire circuit, simulated at the transistor level in a 0.18 μ CMOS process, achieves a FoM (Figure of Merit) of 0.19 pJ/conversion.

Global average pooling (GAP) has been used previously to generate class activation maps. The motivation behind AdGAP comes from the fact that the convolutional filters possess position information of the essential features and hence, combination of the feature maps could help us locate the class instances in an image. Our novel architecture generates promising results and unlike previous method...

theory is a base for all scientific disciplines. theorizing is an important branch in architecture too. there are a little reference that tries to define theory and show the differences between theory in architecture and theory in other disciplines. this article aimed to show the characteristics of architectural theory. at first we try to review different books and articles which are written on...

This communication sets an evaluation framework and performs a comparative analysis of the UltraSPARC-III and the IA-64 processor architectures. It starts with an overview of a pure RISC architecture and the new EPIC technology. It then presents the unique combination of innovative features that both manufacturers claim explicit parallelism, predication and speculative loading – and the goals f...

This paper discusses an architecture for combining learning network and assessment systems (LNAS) with computer-based assessment systems (CBA). The advantage of such a combination is to support reuse and sharing of e-learning materials, in particular for automated formative assessment of programming exercises which are very labour-intensive to create. An architecture for such a combined tool is...

This paper introduces an architecture for quantumdot cellular automata (QCA) systems with the potential for high throughput and low power dissipation. The combination of regions with Bennett clocking and of regions used for memory storage combines the low power advantages of reversible computing and the high throughput advantages of pipelining. A simple case study is employed to evaluate the pr...

Adding recurrent connections to unsupervised neural networks used for clustering creates a temporal neural network which clusters a sequence of inputs as they appear over time. The model presented combines the Jordan architecture [61 with the unsupervised learning technique Adaptive Resonance Theory, FuzzyART[41. The combination yields a neural network capable of quickly clustering sequential p...

We present a new input-queued switch architecture designed to support deadline-ordered scheduling at extremely high-speeds. In particular, deadline-ordered scheduling is enabled through a combination of hardware-based sorted priority queues called P-heaps and a round-robin crossbar scheduler. The priority queues are implemented using a novel scalable pipelined heap-based architecture. Using a 0...

The information-centric nature of today’s main Internet use cases contrasts the node-centric paradigm of the Internet architecture. This results in problems like inefficient information dissemination and limited data availability. To tackle these problems, information-centric networking has become an important research area. In this paper, we present a prototype of an information-centric networ...

In this report we describe a novel technique to generate a committee architecture for time series predic~ion. The algorithm, here named Selective Multiple Prediction Network, consists of three steps: a systematic partition of the input hyperspace, a selective training of many agents and a flexible combining strategy. Potencially uncorrelated agents are generated which improves the combination p...