FPGA (Field-Programmable Gate Array) has received much attention from nuclear industry as an alternative platform of digital I&C (Instrumentation & Control) in nuclear power plants [1,2]. Commercial FPGA synthesis tools synthesize gate-level designs mechanically from RTL (Register Transistor Logic) designs modeled with HDLs (Hardware Description Languages). Nuclear regulation authorities [3], h...

Formal verification has played an important role in demonstrating correctness of safety-critical systems. Small-scale unmanned helicopters have been increasingly developed for various purposes such as scientific exploration and commercial or defense applications. The HELISCOPE project in Korea aims to develop a small-scale unmanned helicopter and its onboard embedded computing system for flight...

Compilers, and especially optimizing compilers, are complicated programs. Bugs in compilers happen, and can lead to miscompilation: the production of wrong executable code from a correct source program. Miscompilation is documented in the literature and a concern for high-assurance software, as it endangers the guarantees obtained by source-level formal verification of programs. Compiler verifi...

This thesis concerns practical application of two methods for program verification. The programming language we consider is a C dialect, called C0, which supports dynamic memory allocation, recursion, pointer types, etc. First, we verify a program using a formalization of small-step semantics of C0. The example we study is a small loop program, which allocates a linked list of the given length ...

Concurrent datatypes are concurrent implementation of classical data abstractions, specifically designed to exploit the great deal of parallelism available in multiprocessor and multicore architectures. The correctness of concurrent datatypes is essential for the overall correctness of the system. In this work we study the problem of aiding in the automation of temporal verification of concurre...

We present an approach to the formal verification of real-time embedded systems by using model checking. We address the verification of systems modeled in a timed Petri net representation and introduce a technique for reducing verification complexity. We translate the Petri net based model into timed automata and make use of available model checking tools to prove the correctness of the system ...

We studied students’ conceptions of correctness and their influence on students’ correctness-related practices by examining how 159 students had analyzed the correctness of error-free and erroneous algorithms and by interviewing seven students regarding their work. We found that students conceptualized program correctness as the sum of the correctness of its constituent operations and, therefor...

Using verification techniques to prove the correctness of systems is becoming more and more important. Especially in the domain of embedded and distributed systems, verification techniques are increasingly being used for quality assurance today. Model checking is a verification technique that allows the automatic verification of systems with a finite state space. Developers create a formal spec...

The Verisoft project aims at the pervasive formal verification of entire computer systems. In particular, the seamless verification of the academic system is attempted. This system consists of hardware (processor and devices) on top of which runs a microkernel, an operating system, and applications. In this paper we define the computation model CVM (communicating virtual machines) in which conc...