2014 The paper describes a new method for the estimation of thermodynamic properties for simulated annealing problems using data obtained during a simulated annealing run. The method works by estimating energy-to-energy transition probabilities and is well adapted to simulations such as simulated annealing, in which the system is never in equilibrium. J. Phys. France 49 (1988) 1485-1492 SEPTEMB...

This article presents the use of the Simulated Annealing algorithm with a heuristic to solve the waste minimization problem in roll cutting programming, in this case, paper. Client orders, which vary in weight, width, and external and internal diameter, are fully satisfied. Several tests were performed with real data from a paper company in which an average of 30% waste reduction and 100% reduc...

We report the result of some growth and annealing techniques in the preparation of n and p-PbTe. PbTe has been grown which is intrinsic at room temperature. Maximums mobilities of 4.7 X 106 and 2.8 X 106 cm2/V X sec have been observed in n andp materials, respectively.

The latent structure behind an observation often plays an important role in the dynamics of visible events. Such latent structure is composed of invisible events named dark events. Human-interactive annealing is developed to visualize and understand dark events. This paper presents an application of human-interactive annealing for extracting new scenarios for patent technology using the latent ...

The well-known logic puzzle Sudoku can be generalized from two to three dimensions by designing a puzzle that is played on the faces of a cube. One variation, already introduced as a puzzle by Dion Church, uses three adjacent faces. Another variation uses all six faces. We have developed a set of rules and constraints for both three-dimensional Sudoku variations and have studied the properties ...

A new constraint-driven methodology for the placement of analog IC's is described. Electrical performance speciications are automatically translated into constraints on the layout parasitics. These constraints and the sensitivity information of the circuit are then used to control a Simulated Annealing-based placement algorithm. At each step of the annealing a fast check on performance degradat...