Most high–level synthesis schedulers are only capable of mapping an operation to one specific module type. To ensure a full design space exploration, a synthesis system should however select freely from a library containing modules with a large variety in delay, area and so on. A novel module selection and scheduling approach is presented, which allows the full use of such unrestricted librarie...

Multi-FPGA Architectures Vinoo Srinivasan Ranga Vemuri University of Cincinnati, Cincinnati OH 45221{0030. E-mail: fvsriniva, [email protected] Abstract This paper presents spade, a system for partitioning designs onto multi-fpga architectures. The input to spade is a task graph, that is composed of computational tasks, memory tasks and the communication and synchronization between tasks. spa...

When analyzing data from computationally expensive simulation codes, surrogate modeling methods are firmly established as facilitators for design space exploration, sensitivity analysis, visualization and optimization. Kriging is a popular surrogate modeling technique used for the Design and Analysis of Computer Experiments (DACE). Hence, the past decade Kriging has been the subject of extensiv...

Real-time systems rely on a distributed global time base. As any physical clock device suffers from noise, it is necessary to provide some kind of clock synchronization to establish such a global time base. Different clock synchronization methods have been invented for individual application domains. The Precision Time Protocol (PTP), which is specified in IEEE 1588, is another interesting opti...

In this paper, we propose a new execution trace driven simulation technique, called the Resource Conflict Methodology (RCM), for modeling and simulating computer systems early in the design cycle. By using a simplified hardware element model which allows the user to easily add or delete hardware elements in the model, RCM allows the user to readily change the machine design being investigated a...

We describe a new methodology and environment for Cyber Physical Systems (CPS) synthesis and demonstrate it in the design of microrobots viewed as CPS. Various types of microrobots have been developed in recent years for applications related to collaborative motion such as, sensor networks, exploration and search-rescue in hazardous environments and medical drug delivery. However, control algor...

System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform’s applicability. This paper presents a framework, called Platune, for performance and power tuning of one such SOC platform. Platune is used to simulate an embedded application that is mapped onto the SOC platform and output p...

H.264/AVC has been designed particularly to improve coding efficiency and network friendliness. In this paper, a simulator and profiler tool set based on the SimpleScalar framework [1] is developed to derive instruction level complexity of the H.264/AVC codec [2]. The reference software JM8.6 is analyzed. Arithmetic, logic, shift, control operations and memory bandwidth requirements for the ful...

This paper presents an unified view of most previous table-lookup-andaddition methods: bipartite tables, SBTM, STAM and multipartite method. This new definition allows a more accurate computation of the error entailed by these methods. Being more general, it also allows an exhaustive design space exploration which has been implemented, and leads to tables smaller than previously published ones ...

Especially in the domain of embedded systems, system development is performed via step-wise design-space exploration, using an incremental addition of design decision. Each development step is characterized by design constraints, limiting the possible solution space. By applying model transformations based on a declarative, relational approach, these constraints can be used to support this expl...