نتایج جستجو برای: electrical array reconfiguration

تعداد نتایج: 330213  

Journal: :Energies 2021

The output of a photovoltaic array is reduced considerably when PV panels are shaded even partially. impact shading causes an appreciable loss in power delivery, since the connected series and parallel to contribute required voltage for load. prevailing research on mitigating mostly based complex reconfiguration strategies where subjected rewiring schemes. On other hand, disperse many studies l...

Journal: :Journal of neural engineering 2018
Daniel J O'Shea Krishna V Shenoy

OBJECTIVE Electrical stimulation is a widely used and effective tool in systems neuroscience, neural prosthetics, and clinical neurostimulation. However, electrical artifacts evoked by stimulation prevent the detection of spiking activity on nearby recording electrodes, which obscures the neural population response evoked by stimulation. We sought to develop a method to clean artifact-corrupted...

2007
HENG TAN Heng Tan

Partial reconfiguration is a unique capability provided by several Field Programmable Gate Array (FPGA) vendors recently, which involves altering part of the programmed design within an SRAM-based FPGA at run-time. In this dissertation, a Multilayer Runtime Reconfiguration Architecture (MRRA) is developed, evaluated, and refined for Autonomous Runtime Partial Reconfiguration of FPGA devices. Un...

2002
Rong Lin

Macrocell also based on a multiply/add approach [2]. Abstract This paper presents the architecture, design and Other researchers, including Hwang (refer to Section test of a unified arithmetic processor, developed based on 6.8 of [21]), Swartzlander [18] and Parhami [16], have recently proposed partial product bit-matrix introduced general (or universal) arithmetic architectures decomposition a...

Journal: :CoRR 2017
Armin Mehrabian Shuai Sun Vikram K. Narayana Volker J. Sorger Tarek A. El-Ghazawi

In this paper we present a reconfigurable hybrid Photonic-Plasmonic Network-on-Chip (NoC) based on the Dynamic Data Driven Application System (DDDAS) paradigm. In DDDAS computations and measurements form a dynamic closed feedback loop in which they tune one another in response to changes in the environment. Our proposed system enables dynamic augmentation of a base electrical mesh topology with...

Journal: :IEEE Access 2022

Partial shading is the most unexpected scenario encountered by arrays that degrade performance causing power reduction, non-convex characteristics curves, losses, hotspot, module damage, and system failure. The adoption of various reconfiguration techniques has recently provided relief to PV array reduce losses during partial shading. However, these exhibit vulnerabilities such as reliable oper...

Journal: :international journal of advanced design and manufacturing technology 0
davoud naderi soheil ganjefar mohamad mosadeghzad

in this research optimal reconfiguration strategy of the improved srr reconfigurable mobile robot based on force-angle stability measure has been designed using genetic algorithm. path tracking nonlinear controller which keeps robot’s maximum stability has been designed and simulated in matlab. motion equations of the robot have been derived in parametric form by means of newton- euler, lagrang...

Journal: :Revista UIS Ingenierías 2023

The problem regarding the reconfiguration of electrical distribution grids is addressed in this research through implementation a practical solution using constructive heuristic algorithm. most important characteristic proposed approach its low-computation effort, given that few power flow solutions are required order to solve problem. algorithm starts exploration space by closing all tie lines...

Journal: :IEEE Trans. Computers 1993
Edwin Hsing-Mean Sha Kenneth Steiglitz

AbstructIn this paper, we study fault-tolerant redundant structures for maintaining reliable arrays. In particular, we assume the desired array (application graph) is embedded in a certain class of regular, bounded-degree graphs called dynamic graphs. We define the degree of reconfigurability D R , and D R with distance D R d , of a redundant graph. When D R (respectively, D R d ) is independen...

2017
Ipseeta Nanda Nibedita Adhikari

Xilinx PLANAHEAD provides RTL to bitstream hierarchical design flow with new user interface and project management capabilities. Partial reconfiguration (PR) is a technique which optimizes utilization of resources of Static Random Access Memory (SRAM) based FPGA dynamically i.e on the fly configuration. In this paper the authors reconfigures some specific regions during runtime [2]. The tool wh...

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