نتایج جستجو برای: formal verification
تعداد نتایج: 187295 فیلتر نتایج به سال:
The application of formal methods (especially, model checking and static analysis techniques) for the verification of safety critical embedded systems has produced very good results and raised the interest of system designers up to the application of these technologies in real size projects. However, these methods usually rely on specific verification oriented formal languages that most designe...
Automotive microcontrollers support an increasing number of safety applications and include various safety mechanisms in order to meet the ISO 26262 standard. Derivatives of product families address different market segments and customers with individual safety requirements. Thus flexibility is needed to adjust the overhead introduced by extra safety circuitry to the actual configurations and s...
There is a desperate need for an immediate practical solution to the problem of verifying large designs. Simulation-based verification has not been able to keep up with increasing design complexity. In spite of increasing simulation and emulation speed, the number of problem cases that can be covered by manually generated functional test vectors or pseudo-random functional testing is declining....
Ensuring the functional correctness of hardware early in the design cycle is crucial for both economic and methodological reasons. However, current verification techniques are inadequate for industrial designs. Formal verification techniques are exhaustive but do not scale; partial verification techniques based on simulation scale well but are not exhaustive. This paper discusses promising appr...
A separation of duties between software developers is usually proposed to cope with formal verification issues within the ModelDriven Engineering (MDE) paradigm. MDE experts are responsible for the definition of models and model transformations, while formal verification experts conduct the verification process. This schema should be aided by (semi)automatic translations from the MDE elements t...
Ensuring the functional correctness of hardware early in the design cycle is crucial for both economic and methodological reasons. However, current verification techniques are inadequate for industrial designs. Formal verification techniques are exhaustive but do not scale; partial verification techniques based on simulation scale well but are not exhaustive. This paper discusses promising appr...
This paper gives a brief description of the KeY system, a tool written as part of the ongoing KeY project, which is aimed at bridging the gap between (a) OO software engineering methods and tools and (b) deductive verification. The KeY system consists of a commercial CASE tool enhanced with functionality for formal specification and deductive verification.
In this paper we explore the application of a formal proof system to verification problems in cryptography. Cryptographic properties concerning correctness or security of some cryptographic algorithms are of great interest. Beside some basic lemmata, we explore an implementation of a complex function that is used in cryptography. More precisely, we describe formal properties of this implementat...
In this article we explore the application of a formal proof system to verification problems in cryptography. Cryptographic properties concerning correctness or security of some cryptographic algorithms are of great interest. Beside some basic lemmata, we explore an implementation of a complex function that is used in cryptography. More precisely, we describe formal properties of this implement...
This paper gives an overview of the KeY approach and highlights the main features of the KeY system. KeY is an approach (and a system) for the deductive verification of object-oriented software. It aims for integrating design, implementation, formal specification and formal verification as seamlessly as possible. The intention is to provide a platform that allows close collaboration of conventi...
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