Several methods of flip angle mapping for magnetic resonance imaging have been proposed. We evaluated the accuracy of five methods of flip angle measurement in the presence of measurement noise. Our analysis was performed in a closed form by propagation of probability density functions (PDFs). The flip angle mapping methods compared were (1) the phase-sensitive method, (2) the dual-angle method...

BACKGROUND AND PURPOSE Compared with MR imaging at 1.5T T1-weighted spin-echo imaging at 3T shows up with reduced gray-to-white matter contrast. The purpose of the present study was to show the effects of alterations of different flip angles as an easily accessible parameter to increase gray-to-white matter contrast. METHODS Spin-echo T1 sequences of 6 healthy volunteers were acquired in a 3T...

Inhibition of BET bromodomains (BRDs) has emerged as a promising cancer therapeutic strategy. Accordingly, inhibitors of BRDs such as JQ1 have been actively developed and some have reached clinical testing. However, the mechanisms by which this group of inhibitors exerts their anticancer activity, including induction of apoptosis, have not been fully elucidated. This report reveals a previously...

Flip and flop splice variants of AMPA receptor subunits are expressed in distinct but partly overlapping patterns and impart different desensitization kinetics to cognate receptor channels. In the absence of specific antibodies, isoform-specific differences in trafficking or localization of native flip and flop subunits remain uncharacterized. We report that in several transfected cell lines, t...

There is no theoretical reason to think that the spin-flip component of the Pomeron is zero. One can measure the spin-flip part using Coulomb-nuclear interference (CNI). Perturbative QCD calculations show that the spin-flip component is sensitive to the smallest quark separation in the proton, while the non-flip part probes the largest separation. According to HERA results on the proton structu...

Abstract: In this paper we present a simple ultra low-voltage and high speed D flip-flop. The delay of the static differential flip-flop presented is less than 12% compared to conventional differential CMOS flip-flops. The presented circuits have been simulated using Hspice and are valid for 90nm TSMC CMOS process. The proposed high-speed and ultra low-voltage flip-flop can be used for any digi...

flip-flop circuit technique has been designed. CMOS new flip-flop circuit with CMOS domino logic which, All the flip-flops were designed using UMC 180. Recognize standard circuit symbols for D Type flip-flops. though can be largely prevented by using the Edge Triggered D Type flipflop illustrated in Fig 5.3.3. locked loop, using 32 nm CMOS technology. Here we design D flipflop for Phase locked ...

The latches are simple circuits with feedback from the digital electrical engineering. We have included in our work the C element of Muller, the RS latch, the clocked RS latch, the D latch and also circuits containing two interconnected latches: the edge triggered RS flip-flop, the D flip-flop, the JK flip-flop, the T flip-flop. The purpose of this study is to model with equations the previous ...

This paper enumerates low power, high speed design of D flip-flop. It presents various techniques to minimize subthershold leakage power as well as the power consumption of the