Downlink beamforming is analyzed for broadband frequency-duplex systems where frequencyselective fading dominates. In order to compare different beamforming strategies, system level simulations are carried out. It is assumed that at the receiver of the mobile station, path diversity can be exploited. The performance gain from maximal ratio combining of the signal components is evaluated with a ...

Figure 6.1.1(a) illustrates the TX structure, which consists of a 64:4 serializer, a 3-tap quarter-rate FFE, a poly-phase filter (PPF) generating quadrature clocks for the latches and selectors, and a combiner (output driver). The low-speed 64:4 serializer can be done in typical CMOS (digital) realization. The 4×14Gb/s inputs coming from it are fed into the quarter-rate FFE, which provides maxi...

Multiplexers and power combiners/dividers are crucial in many applications of electromagnetic waves including microwave terahertz communication. Full-duplex communication requires the separation transmitted received signals; thus, non-reciprocal multiplexers very essential. In this work, we present numerically study a design concept for such circuits from topological cavities. First, quad-port ...

High data rates combined with high mobility represent a challenge for the design of cellular devices. Advanced algorithms are required which result in higher complexity, more chip area and increased power consumption. However, this contrasts to the limited power supply of mobile devices. This presentation discusses the application of an HSDPA receiver which has been optimized regarding power co...

A 3–8 GHz delay-locked loop (DLL) with cycle jitter calibration is presented. To lower the operation frequency of a voltage-controlled delay line (VCDL), this DLL adopts the dividers, an edge combiner, and the multiple VCDLs. A duty cycle correction circuit is presented to maintain the output duty cycle of 50%. This DLL has been fabricated in 90-nm CMOS process. The measured peak-to-peak jitter...

An analytical expression of the cumulative distribution function (cdf) of the normalized signal-to-noise ratio SNR of the maximum ratio combiner (MRC) in correlated Rician fading channels has been derived. The expression is expressed as an infinite power series which can be computed very fast by truncation to a finite number of terms. The analytical expression can handle any number of receiving...

This paper proposes low-complexity preand postfrequency domain equalization and frequency diversity combining methods for block transmission schemes with cyclic prefix. In the proposed methods, the equalization and diversity combining are performed simultaneously in discrete frequency domain. The weights for the proposed equalizer and combiner are derived based on zero-forcing and minimummean-s...

Practical software hardening schemes are heuristic and are not proven to be secure. One technique to enhance security is robust combiners. An algorithm C is a robust combiner for speci cation S, e.g., privacy, if for any two implementations X and Y , of a cryptographic scheme, the combined scheme C(X, Y ) satis es S provided either X or Y satisfy S. We present the rst robust combiner for softwa...