In area efficient low error compensation multiplier design is using fixed width RPR(Reduced Precision Redundancy). We propose a new method called fixed width RPR for DSP applications. This fixed width multiplier is placed in ANT architecture to meet high speed, low power consumption and area efficiency. The fixed RPR is designed with compensation circuit for minimizing the occurrence of error. ...

We develop parallel one-dimensional globally adaptive quadrature algorithms, building on NAG code D01AKF. Our most eeective strategy replaces D01AKF's error estimate ranking strategy by a tabulation approach. D01AKF uses 61-point Gauss-Kronrod (GK) quadrature. We also use the 21-point GK rule. A fuller discussion, with expanded results, is given in 7].

Two quadrature rules for the approximate evaluation of Cauchy principal value integrals, with nodes at the zeros of appropriate orthogonal polynomials, are discussed. An expression for the truncation error, in terms of higher order derivatives, is given for each rule. In addition, two theorems, containing sufficient conditions for the convergence of the sequence of quadrature rules to the integ...