This open-loop gain enhancement circuit in 1.2pm CMOS does not require cascode or long-channel transistors, thus maximizing output swing and input common-mode range [1,21. Since gain enhancement is achieved not by increasing output resistance, but by matching main and replica amplifiers, high effective open-loop gain is maintained even with resistive loads. This circuit can be used with any tra...

In this paper, a low-power adaptive low noise amplifier (LNA) is presented. The LNA is based on a bipolar cascode topology, uses inductive source degeneration and emitter area scaling to achieve noise and input-impedance matching simultaneously. The input impedance and the noise factor were simulated as function of the bias collector current and the results show that both are approximately cons...

A circuit technique to correct Vdd/PM distortion and improve efficiency as supply modulation of cascode class-E PAs has been proposed. The experimental result shows that the phase distortion can be improved from 20 degrees to 5 degrees. Moreover, a system co-simulation result demonstrated that the EVM can be improved from −17 dB to −19 dB. key words: envelope elimination and restoration (EER), ...

of photodiode and transimpedance amplifier on a 12.4 Moisture Sensitivity and Soldering. narrowly-focused beam falling only on the photodiode provides improved settling times from allanalog circuits to data conversion base circuits. Q1 and Q2 form a "cascode" amplifier circuit. To compensate for the high-frequency rolloff of the photodiode, U1B is configured as Daylight modifications will drama...

Superharmonic injection locking is investigated in a new theoretical approach. Low power frequency dividers are designed using injection locked oscillators with cascode transistors. The Rockwell 0:5 m CMOS process is used to design a 3mW injection locked frequency divider in the 1800MHz frequency range. A 200MHz maximum locking range is achieved in simulations. 2SC3302 TOSHIBA NPN transistors a...

The effect of gate – drain/source underlap ( Lun ) on a narrow band LNA performance has been studied , in 30 nm FinFET using device and mixed mode simulations. Studies are done by maintaining and not maintaining the leakage current (Ioff) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain and noise-figure have been used...

The LNA is implemented using 90nm CMOS technology. The cascode topology with single-ended source degeneration using inductor is employed. The high gain is achieved by using common-source (CS) amplifier. A different input matching as well as output matching topology may improve the efficiency and minimize noise of the LNA. An inductance network (Lg, Ls) is used for input matching. An interstage ...

This paper describes a 60-GHz differential power amplifier (PA) designed in a 120-GHz fT 90nm CMOS technology. It consists of three identical differential cascode stages with inter-stage matching implemented by wide-gap coplanar waveguide (CPW) structures and M6M5 plate capacitors. A double-stub network realized by CPWs provides more design freedom for the input matching. Load-pull simulation g...

* D Abstract --Lossless broad-band microwave active inductors for generalpurpose use in microwave circuits are proposed and their characteristics are discussed. These active inductors are composed of a common-source cascode FET and a feedback FET, and operate in a wide frequency range with very low series resistance. A maximum Q factor of 65 is obtained. Theoretically, it can reach infinity. Fu...

This work presents a study of the use of a transistor with a different configuration in the channel region, named GradedChannel (GC), for analog application in current mirror circuits with different architectures: Common-source, Cascode and Wilson. A comparison will be done between current mirrors implemented with standard (uniformly doped) SOI and GC SOI nMOSFETs by using simulation and experi...