This paper aims to adopt nano-medicine devices with bionics (function like living organisms) in embedded systems (isolation) allow health rehabilitation of patients at home avoid infection the Coronavirus. Measuring various patient's vital signals such as temperature, blood oxygen percentage, pressure, heartbeat, and glucose level (to pump insulin body control sugar level) are included our obje...

Analog-centric RFCMOS technology has played an important role in motivating the change of technology from conventional discrete device technology or bipolar IC technology to CMOS technology. However it introduces many problems such as poor performance, susceptibility to PVT fluctuation, and cost increase with technology scaling. The most important advantage of CMOS technology compared with lega...

a high accurate and low-voltage analog cmos current divider which operates with a single power supply voltage is designed in 0.18µm cmos standard technology. the proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. the proposed divider is modeled with neural network while tlbo algorithm is used to optimize it. the proposed optimization...

— Random device mismatch that arises as a result of scaling of the CMOS (complementary metal-oxide semiconductor) technology into the deep submicron regime degrades the accuracy of analogue circuits. Methods to combat this increase the complexity of design. We have developed a novel neuromorphic system called a Trainable Analogue Block (TAB), which exploits device mismatch as a means for random...

complementary metal-oxide semiconductor (cmos) technology has been the industry standard to implement very large scale integrated (vlsi) devices for the last two decades. due to the consequences of miniaturization of such devices (i.e. increasing switching speeds, increasing complexity and decreasing power consumption), it is essential to replace them with a new technology. quantum-dot cellular...

A wide-range all-digital duty-cycle corrector (ADDCC) with output clock phase alignment is presented in this paper. The proposed ADDCC can correct the duty-cycle error of the input clock to 50% duty-cycle. The acceptable duty-cycle range and frequency range of input clock is from 20% to 80% and from 250MHz to 1GHz, respectively. The proposed ADDCC is implemented on a standard performance 65 nm ...

THE DEMAND for ever smaller, portable, energyefficient and high-performance electronic systems has been the primary driver for CMOS technology scaling. As CMOS scaling approaches physical limits, it has been fraught with challenges that required introduction of newer materials, manufacturing processes and device structures. High-κ oxide and metal-gate stack was introduced to mitigate oxide leak...