In this paper, we propose block matching and learning for color image classification. In our method, training images are partitioned into small blocks. Given a test image, it is also partitioned into small blocks, and mean-blocks corresponding to each test block are calculated with neighbor training blocks. Our method classifies a test image into the class that has the shortest total sum of dis...

Document image matching is the key technique for document registration and retrieval. In this paper, a new matching algorithm based on document component block list and component block tree is proposed. Our method can effectively make use of the local information of each page block and the global information of page layout, while it is also robust to image distortion, filled-in text, and noises...

Hierarchical block matching is an eecient motion estimation technique which provides an adaptation of the block size and the search area to the properties of the image. In this work, we propose two novel special-purpose architec-tures for implementing hierarchical block matching. The rst architecture is memory-eecient, but requires a large external memory bandwidth and a large number of process...

This paper presents a patch-based image filtering algorithm for additive noise reduction. Our algorithm is a modification to the block matching 3D algorithm, where an adaptive thresholding was used for the collaborative hardthresholding step. The collaborative Wiener filtering step was also modified by assigning more weights for similar patches. Experimental results show that our algorithm outp...

This paper introduces a depth-computation architecture designed for, but not limited to, a single-chip current mode analog VLSI (aVLSI) implementation of stereo vision. The architecture implements a modified version of the block matching algorithm; pixel blocks are averaged (summed) vertically before comparison along the horizontal axis. This both reduces the effects of noise and provides an or...

This paper presents a pipelined architecture for the hierarchical block-matching motion estimation algorithm (HBMA). The hierarchical style leads enormous computation and complex data flow between hierarchy levels. Each stage of the proposed architecture consists of a systolic array for block-matching and an interpolation unit for bilinear interpolation. The interpolation unit regulates also th...

| This paper describes a VLSI architecture which can be recon gured to support both Full Search Block{Matching algorithm and 3{step Hierarchical Search Block{Matching algorithm. By using a recon gurable register{ mux array and a parameterizable adder tree, the 2{D array architecture provides e cient real time motion estimation for many video applications. We also propose a memory architecture a...

Document image matching is the key technique for document image registration and retrieval. In this paper, a new matching method based on document component block list (CBL) is proposed. A document image is ®rstly parsed into a number of component blocks that are de®ned as non-adherent rectangular areas of substantial document contents. Then these blocks are organized as a list, on which severa...

Motion estimation is a key technique in most algorithms for video compression and particularly in the MPEG and H.261 standards. The most frequently used technique is based on a Full Search Block Matching Algorithm which is highly computing intensive and requires the use of special purpose architectures to obtain real-time performance. In this paper we propose an approach to the parallel impleme...

Many fast block-matching algorithms reduce computations by limiting the number of checking points. They can achieve high computation reduction, but often result in relatively higher matching error compared with the full-search algorithm. In this letter, a novel fast block-matching algorithm named normalized partial distortion search is proposed. The proposed algorithm reduces computations by us...