نتایج جستجو برای: clock and data recovery cdr
تعداد نتایج: 17056444 فیلتر نتایج به سال:
Purpose: We propose an analysis of dyscirculatory angiopathy of Alzheimer’s type (DAAT) endovascular treatment method based on transcatheter revascularization and recovery of collateral and microvascular bed of the brain by means of low-energy transluminal laser irradiation as well as its comparison with traditional Alzheimer’s disease (AD) treatment methods. Methods: The research involved 81 p...
Deficiency and inappropriate distribution of reengage station is one of challenges faced by researchers in hydrology and climate science. In this research, evaluate the applicability of four gridded precipitation data products ERA-Interim, PERSIANN-CDR, PERSIANN-CCS and CRU as a supplement or substitute for ground data in a monthly time scales. This assessment was done by comparison with observ...
the purpose of this study is to describe and determine the relationship between relationship marketing, customer satisfaction and intention to revisited in mashhad’s women aerobics clubs. to do this,300 randomly customers from women aerobic clubs were chosen and data was collected through kim relationship marketing questionnaire(2008) and ?=0.92, lim satisfaction questionnaire(2008) and ?=0...
A burst-mode clock recovery circuit with a novel dual bit-rate structure is presented. It utilizes two gatedII. GATED-OSCILLATOR BASED CLOCK RECOVERY oscillators to align clock with data edges and can operate in GOCRC (Gated-Oscillator based Clock Recovery half-rate clocking mode, doubling data throughput, as well as Circuit) was originally developed for magnetic drum data in full-rate clocking...
abstract this study aimed at investigating the impact of etymology strategy instruction on the development of vocabulary of iranian intermediate efl learners. etymology, knowledge of origin of words, roots, and affixes, has proved to be a controversial issue and a question of long debate with regard to its impact on the process of vocabulary learning. this study employed etymology strategy in ...
We report on a clock-recovery circuit employing a phase locked loop (PLL) at 56.88 Gb/s demonstrated by locking to a 28.44 GHz sinosoidal signal while two additional circuits with adapted on-chip passive components locked to 29 Gb/s and 39 Gb/s pseudorandom bit sequences. To our knowledge, this is the first demonstration of an integrated PLL IC for clock recovery at a data rate well beyond 40 G...
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