A simple and analytical design methodology for a novel planar four-port structure to implement power divider (PD) or balun with variable power division is proposed in this paper. It consists of two different 3 dB branch-line couplers and one coupled-line phase shifter whose length can be changed to implement variable power division. Different from the previous designs, the power divider and bal...

The CMOS PLL based Frequency Synthesizer is a vital role in Receiver front end Sub component. The main objective of this paper is to design a high frequency of oscillation, less phase noise and power efficient PLL. In general, the PLL contains PFD, Loop Filter, VCO and Frequency Divider. The VCO is a critical component in Phase Locked Loop for low power CMOS designs. Here the Source Coupled VCO...

We present a scalable high-speed divide-by-N frequency divider using only basic digital CMOS circuits. The divider achieves high-speed operation using a novel parallel counter and a pipelined architecture. The parallel counter is based on a state look-ahead component in conjunction with an internal pipeline structure in order to simultaneously trigger all state value updates without a rippling ...

Received Feb 14, 2017 Revised Jun 1, 2017 Accepted Aug 11, 2017 Design and simulation for reconfigurable Wilkinson Power Divider (WPD) related to WiMAX application is proposed in this paper. This proposed design relates to dual band WiMAX frequencies at 2.5 GHz and 3.5 GHz. The main purpose of this design is to design a switchable feeding network that can cover the WiMAX standards by reconfigur...

This work proposes a substrate integrated waveguide (SIW) power divider employing the Wilkinson configuration for improving the isolation performance of conventional T-junction SIW power dividers. Measurement results at 15GHz show that the isolation (S23, S32) between output ports is about 17 dB and the output return losses (S22, S33) are about 14.5 dB, respectively. The Wilkinson-type performa...