Demand for accommodating more and new functionalities within a single chip such as SOC needs novel devices architecture FinFET instead of MOSFET. emerged non-planar, multigate device to overcome short channel effects subthreshold swing deterioration, drain induced barrier lowering threshold voltage roll-off which degrade circuit performance. As the need technology is mounting in electronic gadg...

An optimized doping process is used to achieve extremely-low threshold voltage (ELVT) FinFETs for low-power mmWave applications based on 12nm node technology platform. With the VTH ≈ 100mV ELVT FinFET shows 15% IEFF improvement at same VDD compared its super-low (SLVT) counterpart, while mismatch and reliability performances are comparable. FT/FMAX of 305GHz/ 315GHz comparable Maximum Stable Ga...

Compact Models for Future Generation CMOS by Darsen Duane Lu Doctor of Philosophy in Engineering — Electrical Engineeing and Computer Sciences University of California, Berkeley Professor Chenming Hu, Chair Multiple-gate MOSFETs with superior short channel control are expected to replace planar CMOS in the near future. An accurate and computationally efficient compact transistor model is necess...

Semiconductor flash memory is an indispensable component of modern electronic systems. The minimum feature size of an individual CMOSFET has shrunk to 15nm with an equivalent gate oxide thickness (EOT) of 0.8nm in 2001. However, semiconductor flash memory scaling is far behind CMOS logic device scaling. For example, the EOT of the gate stack in semiconductor flash memory is still more than 10nm...

Recently, there is strong interest in FinFET technology on bulk for lower cost and good compatibility with planar CMOS. Intel’s 22nm CMOS node is the 1 st commercially available bulk-FinFET technology and opens a new era of 3D CMOS for the low-power mobile electronics and continuously driving CMOS scaling and Moore’s law. The challenges in manufacturing FinFETs are reviewed. The Si surface of f...

Keywords: SRAM Dynamic back-gate design FinFET Robust Low power a b s t r a c t In this paper, we propose a robust SRAM design which is based on FinFETs. The design is performed by dynamically adjusting the back-gate voltages of pull-up transistors. For the write operation, we use an extra write driver which sets the desired back-gate voltages during this operation. This approach considerably i...

The Screen-Grid Field Effect Transistor (SGrFET) is a planar MOSFET-type device with a gating configuration consisting of metal cylindrical fingers inside the channel perpendicular to the current flow. The SGrFET operates in a MESFET mode using oxide insulated gates. The multi-gate configuration offers advantages for both analog and digital applications, whilst the gate cylinder holes can be ex...

We study the electrical transport through single As donors incorporated in the channel of a FinFET, i.e. a donor in a three-terminal geometry. By means of spectroscopic measurements in conjuction with a NEMO-3D model, we can identify the excited states and associate them with either the donors Coulomb potential, a triangular well at the interface or a hybridized combination of the two. The corr...

Nowadays, transistor technology is going toward the fully depleted architecture; the bulk transistors are becoming more complex in manufacturing as the transistor size is becoming smaller to achieve the high performance especially at the node 28 nm. This is the first of two papers that discuss the basic drawbacks of the bulk transistors and explain the two alternative transistors: 28 nm UTBB FD...