Abstract. We present a new abstraction method for heap structures that is based on hyperedge replacement grammars. We use labeled hypergraphs as abstract representation of heap structures. A given hypergraph replacement grammar induces a set of concrete heap structures from a hypergraph. Our technique allows to abstract and concretize the heap partially. Thus the heap parts of high entropy can ...

Researchers have proposed many tools and techniques that work by traversing the heap, including checkpointing systems, heap profilers, heap assertion checkers, and dynamic software updating systems. Yet building a heap traversal for C remains difficult, and to our knowledge extant services have used their own application-specific traversals. This paper presents C-strider, a framework for writin...

Shape analysis is a promising technique to prove program properties about recursive data structures. The challenge is to automatically determine the data-structure type, and to supply the shape analysis with the necessary information about the data structure. We present a stepwise approach to the selection of instrumentation predicates for a TVLA-based shape analysis, which takes us a step clos...

,4 simple implementation of doubleended priority queues is presented. The proposed structure, called a min-max heap, can be built in linear time; in contrast to conventional heaps, it allows both FindMin and FindMax to be performed in constant time; Insert, DeleteMin, and DeleteMax operations can be performed in logarithmic time. Min-max heaps can be generalized to support other similar order-s...

This paper presents an efficient context-sensitive heap analysis algorithm called Data Structure Analysis designed to enable analyses and transformations on entire disjoint recursive data structures. The analysis has several challenging properties needed to enable such transformations: context-sensitivity with cloning (essential for proving disjointness), field-sensitivity, and the use of an ex...

Increasingly tight energy design goals require processor architects to rethink the organizational structure of microarchitectural resources. We examine a new multilateral cache organization, replacing a conventional data cache with a set of smaller region caches that significantly reduces energy consumption with little performance impact. This is achieved by tailoring the cache resources to the...