A method for dividing a polynomial of degree (2n-l) by a precomputed nth degree polynomial in 0(n log n) arithmetic operations is given. This is used to prove that the evaluation of an nth degree polynomial at n+1 arbitrary points can be done in 0(n log^ n) arithmetic operations, and consequently, its dual problem, interpolation of an nth degree polynomial from 2 n+1 arbitrary points can be per...

Interval arithmetic is mathematically defined as set arithmetic. For implementation issues, it is necessary to detail the representation of intervals and to detail formulas for the arithmetic operations. Two main representations of intervals are considered here: inf-sup and midrad. Formulas for the arithmetic operations, using these representations, are studied along with formulas that trade of...

Floating-point summation is one of the most important operations in scientific/numerical computing applications and also a basic subroutine (SUM) in BLAS (Basic Linear Algebra Subprograms) library. However, standard floating-point arithmetic based summation algorithms may not always result in accurate solutions because of possible catastrophic cancellations. To make the situation worse, the seq...

A method to achieve maximally fast (rate-optimal) recursive filters implemented using distributed arithmetic is presented. The filters will have the same upper bound on the sample frequency as if they were implemented using bit-serial multipliers and adders. Maximally fast implementation is important for high-speed recursive filters, but also as any excess speed can be traded for low power cons...

The paper presents a Pipelined Parallel Processor Architecture design to implement MD4 Message digest Algorithm which computes the message digest or the fingerprint of 128 bit fixed length, for any arbitrary length of input message. The processor implements the arithmetic, logic and circular ship operations by Pipelined Parallel Process. The architecture i s designed to suit the design flexibil...

A simple Neural Network model is presented for end-to-end visual learning of arithmetic operations from pictures of numbers. The input consists of two pictures, each showing a 7-digit number. The output, also a picture, displays the number showing the result of an arithmetic operation (e.g., addition or subtraction) on the two input numbers. The concepts of a number, or of an operator, are not ...

Abstract: In this paper, a highly area-efficient multiplier-less FIR filter is presented. Distributed Arithmetic (DA) has been used to implement a bit-serial scheme of a general asymmetric version of an FIR filter, taking optimal advantage of the 3-input LUT-based structure of FPGAs. The implementation of FIR filters on FPGA based on traditional arithmetic method costs considerable hardware res...

multiplier is one of the important components in many systems such as digital filters, digital processors and data encryption. improving the speed and area of multipliers have impact on the performance of larger arithmetic circuits that are part of them. wallace algorithm is one of the most famous architectures that uses a tree of half adders and full adders to increase the speed and reduce the...