At the core of contemporary VLSI designs is the task of determing and evaluating the set of decisions relevant for the particular design project. In many designs the set of design decisions is handled intuitively, and also the set of alternatives for each of the design decisions is strongly influenced by experiences from earlier designs. The paper discusses the list of design decisions under co...

This chapter presents a brief overview of some of the major research contributions in the area of VLSI computing with optical interconnects since the early modelings of the 1980s to today’s MEMS implementations. Both free-space and fiber-guided interconnects are covered. Various models and architectures with optical interconnects are shown, and aspects of their algorithmic design are also revie...

This paper discusses recently introduced strategies in implementing DSP systems using residue replication; in particular we highlight current work underway in the VLSI Research Group, at the University of Windsor, in the area of constructing high throughput DSP systems on silicon. The paper first briefly reviews the theory and mapping techniques, associated with general residue and residue repl...

A set of polygons is called c-oriented if the edges of all polygons are oriented in a constant number of previously defined directions. The intersection searching problem is studied for such objects, namely: Given a set of c-oriented polygons P and a c-oriented query polygon q, find all polygons in P that intersect q. It is shown that this problem can be solved in O(logZn + t) time with O(n log...

In this paper we review relevant problems in the modelling of DC-DC converters with switched capacitors. We study several approaches that overcome the exposed modelling difficulties, addressing ideal and nonideal cases and using dynamic equations that are valid in a large signal domain.

This paper summarizes aspects of the VLSI development of a high-speed wireless local area network (WLAN). The implications for system-on-achip designs are summarized.

Design Rule Checking (DRC) in VLSI design involves checking if a given VLSI layout satisfies a given set of rules, and reporting the violations if any. We propose data structures for reporting violations of the minimum extension rule in a query window of