We construct a strong physical unclonable function (PUF) with provable security against machine learning (ML) attacks on both classical and quantum computers. The is guaranteed by the cryptographic hardness of decryption functions public-key cryptosystems, learning-with-errors (LWE) problem defined integer lattices. call our construction lattice PUF. PUF physically obfuscated key an LWE block. ...

Despite the recent progress in light field super-resolution (LFSR) achieved by convolutional neural networks, correlation information of LF images has not been sufficiently studied and exploited due to complexity 4-D data. To cope with such high-dimensional data, most existing LFSR methods resorted decomposing it into lower dimensions subsequently performing optimization on decomposed subspaces...

The technique of Test pattern generation plays a key role in Built-In-Self-Test(BIST) architecture implementation. Main problem with any test pattern generator is to produce extended, random path succession which is applied to Circuit Under Test(CUT) for detecting faults. As real long numbers can be acquired as a part of physical developments only, these are complex to be employed inactual appl...

A New Class of Stream Ciphers Combining LFSR and FCSR Architectures 22 François Arnault, Thierry P. Berger, and Abdelkader Necer Slide Attack on Spectr-H64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Selçuk Kavut and Melek D. Yücel On Differential Properties of Pseudo-Hadamard Transform and Related Mappings (Extended Abstract) . . . . . . ....

This paper proposes the Turing stream cipher. Turing offers up to 256-bit key strength, and is designed for extremely efficient software implementation.It combines an LFSR generator based on that of SOBER [21] with a keyed mixing function reminiscent of a block cipher round. Aspects of the block mixer round have been derived from Rijndael [6], Twofish [23], tc24 [24] and SAFER++ [17].

A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simultaneously and guarantees complete fault coverage. The new scheme may require less chip area than a classical LFSR-based approach while better or even complete fault coverage is obtained at the same time.