Line × tester design was employed to evaluate nine parents of Corchorus olitorius for their combining ability and heterosis seedling traits under normal drought conditions. Analysis variance revealed significant differences among the crosses. Under conditions, root length, fresh dry weight roots, volume, shoot exhibited contributions line interaction hybrid. Among parents, JRO 3690 OIN 970 disp...

This paper suggests two test architectures for testing distributed, concurrent systems: a global tester that has total control over the distributed system under test (SUT) and, more interestingly, a distributed tester comprising several concurrent tester components. The test architectures rely on a grey-box testing approach that allows to observe internal interactions of the SUT by the tester. ...

Heterosis and combining ability were calculated for 13 different morphological, yield, quality-related traits of 18 F1 Brassica napus hybrids developed through line × tester mating design using 6 lines 3 testers along with their parents. Line ANOVA revealed highly significant results among all characters except primary branches per plant. ZM-R-2 (tester) was identified as a good general combine...

Reciprocal crosses were made between pairs of plants showing the "aberrant ratio" (AR) effect at the a locus, and simultaneously between these plants and an aa tester. The results suggested that the AR effect in the particular line that was used could be explained by inactivation of a gene other than A, but also required for aleurone color. Segregation ratios in additional crosses largely fit e...

This note refers to the effect of the proximity parameter on the operation of (standard) property testers. Its bottom-line is that, except in pathological cases, the effect of the proximity parameter is restricted to determining the query complexity of the tester. The point is that, in non-pathological cases, the mapping of the proximity parameter to the query complexity can be reversed in an a...

We describe a low-cost, functional tester for the MacII that allows students to test and debug digital systems interactively. This tester provides a large number of programmable I/O signals and can be used to test chips, boards and subsystems. Test programs are easily written using a simple, intuitive interface and we expect a variety of interactive graphical testing and debugging environments ...

The simplest structural tester is one which merely investigates the static logical structure of an IC through a JTAG 1149.1 Boundary Scan port[1]. This is possible if the IC is implemented with the appropriate private JTAG instructions and uses full scan design[2]. Such a tester is little more than a few power supplies, a device fixturing arrangement, three digital input drivers, one digital ou...