Chemically assembled electronic nanotechnology (CAEN) is under intense investigation as a possible alternative or complement to CMOS-based computing. CAEN is a form of molecular electronics that uses directed selfassembly and self-alignment to construct electronic circuits from nanometer-scale devices that exploit quantummechanical effects. Although expected to have densities greater than 10 ga...

This paper describes the concept of a modular test code developed to reside in Microcontroller Units (MCUs) with Read-Only Memory (ROM) to make easier the test bench evaluation of integrated circuit (IC) prototypes designed at Brazil Semiconductor Technology Center (BSTC). MCU standard input/output ports are used to select independent operating modes and to transfer data from/to a hostcomputer....

Memory-Built In Self-Test (MBIST) is an very effectual and output enrichment for embedded RAMs. This paper presents effectual MBIST concepts of Built-In-Self Test (BIST) using Performance Accelerator Algorithm (PAA). This BIST concept very stretchable for embedded RAMs with suitable operation. PA algorithm efficiently detects probable number of fault models compare to other March test algorithm...

The way integrated technology is growing becomes very difficult to apply circuit testing using Automatic TEST Equipment of complex circuit for this BIST (Built In Self test) is the solution of complex IC. Here we are applying BIST for UART which is considering as a low speed, low cost data exchange between computer and peripherals. Hence this paper shows implementation of UART with BIST capabil...

With increasingly stringent requirements for memory test, the complexity of the test algorithm is increasing. This will make BIST (Build-In-Self-Test) circuit more complex and the area of BIST circuit larger. This paper proposes a novel controllable BIST circuit. The controllable BIST circuit provides a cost-effective solution that supports a variety of March algorithms and SRAM embedded testin...

ÐThis paper presents an integrated approach for both built-in online and offline testing of embedded DRAMs. It is based on a new technique for output data compression which offers the same benefits as signature analysis during offline test, but also supports efficient online consistency checking. The initial fault-free memory contents are compressed to a reference characteristic and compared to...

In this paper we present a microprocessor-based approach suitable for embedded flash memory testing in a System-on-achip (SOC) environment. The main novelty of the approach is the high flexibility, which guarantees easy exploitation of the same architecture to different memory cores. The proposed approach is compatible with the P1500 standard. A case study has been developed and demonstrates th...

A multi-purpose digital test core utilizing programmable logic has been introduced [1,2] to implement many of the functions of traditional automated test equipment (ATE). While previous papers have described the theory, this paper quantifies the results and presents additional applications with improved methods operating up to 4.4Gpbs. The digital test core provides a substantial number of prog...

A multi-purpose digital test core utilizing programmable logic has been introduced [1,2] to implement many of the functions of traditional automated test equipment (ATE). While previous papers have described the theory, this paper quantifies the results and presents additional applications with improved methods. The digital test core provides a substantial number of programmable I/O for testing...

memory is not a single entity. it is a gift of mother nature, the ability of living organisms to retain and to utilize acquired knowl- edge. memory is precisely related to learning, in that memory in biolog- ical systems entails learning and that learning implies retention of such information. memory can be divided into multifaceted systems. the renaissance of encephalon compatible learning app...