This paper presents the size miniaturized and harmonic suppressed lossless 1:4 T-junction unequal power divider using an open complementary split ring resonator (OCSRR). By embedding the OCSRR structure in the microstrip transmission line, slow wave effect is introduced and thereby size reduction is achieved. The dimensions of OCSRR are optimized to reduce the length of high impedance and low i...

The design of compact wideband microwave reflectometers for the purpose of inclusion in a breast cancer detection system is presented. In this system, a wideband frequency source is used to synthesize a narrow pulse via the step-frequency synthesis method. The reflectometer undertakes measurements in the frequency domain and the collected data is transformed to the time/space domain using IFFT....

This paper presents a quadrature injection locked frequency divider (ILFD) employing tunable active inductors (TAIs), which are used is to extend the locking range and to reduce die area. The CMOS ILFD is based on a new quadrature voltage-controlled oscillator (VCO) with cross-coupled switching pairs and TAI-C tanks, and was fabricated in the 0.18-μm 1P6M CMOS technology. The divide-by-2 LC-tan...

In this paper, Frequency divider by 2 circuit using D-flip-flop is done, based upon this a4/5 prescaler, 16/17 prescaler,32/33 prescalerareverified. Along with it the design of wide band multimodulus 320/321prescaler.CMOS single phase clock pre-scalar,wideband single phase clock 2/3 pre-scaler are also designed. A dynamic logic multiband flexible integer-N divider is designed which uses the wid...

Measurement accuracy is an important performance indicator for high-voltage direct current (HVDC) voltage dividers. The temperature rise effect a HVDC divider’s internal resistance has adverse on measurement accuracy. In this paper, by building solid model of DC divider, the characteristic and error caused in divider were theoretically simulated. We found that with increase height working time,...

A high-speed triangular-modulated spread-spectrum clock generator using a fractional phase-locked loop is presented. The fractional division is implemented by a nested fractional topology, which is constructed from a dual-modulus divide-by-(N–1/16)/N divider to divide the VCO outputs as a first division period and a fractional control circuit to establish a second division period to cause the o...

This paper presents a new simple configuration to realize the voltage-controlled floating resistor, which is suitable for integrated circuit implementation. The proposed resistor is composed of three main components: MOS transistor operating in the non-saturation region, DDCC, and MOS voltage divider. The MOS transistor operating in the non-saturation region is used to configure a floating line...

A simple odd number frequency divider with 50% duty cycle is presented. The odd number frequency divider consists of a general odd number counter and the proposed duty cycle trimming circuit. The duty cycle trimming circuit can output 50% duty cycle with only additional six transistors. A prototype divide-by-5 circuit with 50% duty cycle was implemented for a 500-Mb/s ∼ 5.6-Gb/s 1:10 CDR/DEMUX ...

Superharmonic injection locking is investigated in a new theoretical approach. Low power frequency dividers are designed using injection locked oscillators with cascode transistors. The Rockwell 0:5 m CMOS process is used to design a 3mW injection locked frequency divider in the 1800MHz frequency range. A 200MHz maximum locking range is achieved in simulations. 2SC3302 TOSHIBA NPN transistors a...

An unequal Wilkinson power divider with adjustable power dividing ratio is proposed. The proposed power divider consists of rectangular defected ground structure (DGS), isolated island in DGS, and varactor diodes. The impedance of the microstrip line greatly increases due to the DGS, and varies because of the varying capacitance of diodes. The measured unequal dividing ratios vary from 1.97–13....