In this paper, we have implemented and designed a sorting network for reversible logic circuits synthesis in terms of n*n Toffoli gates. The algorithm presented in this paper constructs a Toffoli Network based on swapping bit strings. Reduction rules are then applied by simple template matching and removing useless gates from the network. Random selection of bit strings and reduction of control...

We demonstrate a new architecture for an optical entangling gate that is significantly simpler than previous realizations, using partially polarizing beam splitters so that only a single optical mode-matching condition is required. We demonstrate operation of a controlled-z gate in both continuous-wave and pulsed regimes of operation, fully characterizing it in each case using quantum process t...

Quantum-dot Cellular Automata (QCA) is one of the emerging nanotechnologies, promising alternative to CMOS technology due to faster speed, smaller size, lower power consumption, higher scale integration and higher switching frequency. Also, power dissipation is the main limitation of all the nano electronics design techniques including the QCA. Researchers have proposed the various mechanisms t...

A porphyrin-silicon nanowire (Si-NW) hybrid field-effect transistor is introduced. The hybrid device has separate electrical and optical gates surrounding the Si-NW channel. Porphyrin, a component of chlorophyll, is employed as an optical gate to modulate the potential of the Si-NW channel. Due to the independently formed hybrid gates, both optical and electrical excitation can effectively modu...

in this paper a novel all-optical logic nand, nor and xor gate based on nonlinear directional coupler theory is demonstrated. we use the identical structure which contains three waveguides, for designing these gates; the only difference however, is the power of inputs light beam. in other words, while a beam with 4 w/μm in power considered as logical one, the output is nand gate and if a beam w...

This paper demonstrates the reversible fault tolerant logic synthesis for the Field Programmable Gate Array (FPGA) and its realization using MOS transistors. Algorithms to design a compact reversible fault tolerant n-to-2 decoder, 4n-to-n multiplexers, a random access memory and a Plessey logic block of the FPGA have been presented. In addition, several lower bounds on the numbers of garbage ou...

This paper discusses various applications of permutation group theory in the synthesis of reversible logic circuits, consisting of Toffoli gates with negative control lines. First asymptotically optimal synthesis algorithm is described. An algorithm for the gate complexity reduction, based on equivalent replacements of gates compositions, is introduced. New approach for combining group theory b...

Circuit realizations generated by reversible logic synthesis approaches may not be optimal, thus it is common to apply post-synthesis optimization techniques. This paper proposes an algorithm that uses a ranking system for identifying the best match with circuitreduction templates. These templates incorporate both positive and negative control Toffoli gates. A reduction in quantum cost was achi...