We extend the concept of optical content-addressable parallel processing [Appl. Opt. 31, 3241 (1992)] to a novel architecture designed specifically for the parallel and high-speed implementation of database operations called optical content-addressable parallel processor for relational database processing (OCAPPRP). An OCAPPRP combines a parallel model of computation, associative processing, wi...

This paper describes the design and implementation of functionally distributed control architecture for real-time control of robot systems. Robot systems must control several functions in parallel for decision, action, and recognition. In order to fulfill this requirement, we propose the architecture based on parallel/distributed control. The robot system based on this architecture is designed ...

General purpose computing architectures are evolving quickly to become manycore and hierarchical: i.e. a core can communicate more quickly locally than globally. To be effective on such architectures, programming models must be aware of the communications hierarchy. This thesis investigates a programming model that aims to share the responsibility of task placement, load balance, thread creatio...

In this paper, we will present an architecture for the implementation of a real time stereoscopic images correction's approach. This architecture is parallel and makes use of several memory blocs in which are memorized pre calculated data relating to the cameras used for the acquisition of images. The use of reduced images proves to be essential in the proposed approach; the suggested architect...

We propose a new architecture and its implementation called PVMWebCluster which enables easy parallelization of PVM task execution both onto geographically distributed PVM clusters and within them. Task submission is done by calling Web services that negotiate the best cluster(s) for the task and communicate with clusters via CORBA method invocation. PVMWebCluster supports tightly-coupled high ...

Mapping parallel algorithms to parallel computing platforms requires several activities such as the analysis of the parallel algorithm, the definition of the logical configuration of the platform, and the mapping of the algorithm to the logical configuration platform. Unfortunately, in current parallel computing approaches there does not seem to be precise modeling approaches for supporting the...

Recently the new field of parallel imaging accusation has the potential to revolutionize the field of fast MR imaging. The SPACE RIP technique is one of the parallel imaging methods which uses multiple receiver coil and utilizes the sensitivity profile information from a number of receiver coils in order to reduce the acquisition time. The image reconstruction problem of SPACE RIP is a computat...

A low-power, large-scale parallel digital video (DV) [1] encoder architecture for a single-chip digital CMOS video camera is discussed in this paper. This architecture is based on the single chip CMOS camera MPEG-2 encoder architecture proposed in [2] with an emphasis on formatting and streaming of the compressed data. The architecture proposed here supports the 625/25 format of 720x576 pixels ...

The purposes for the research and development of the RWC massively parallel computer project are (1) to e ciently support exible and integrated computation which are research targets in RWC Project, and (2) to pursue a general purpose massively parallel system e ciently supporting multiple programming paradigms, and (3) to realize a stand{alone system which has a mature operating system. For th...

The Integral Parallel Architecture (IPA) developed by BrightScale is a low-power & low-area one-chip solution to solve intense computational problems using data-parallel, time-parallel and speculative-parallel mechanisms. BrightScale technology is presented and analyzed from the point of view of each of the 13 computational motifs proposed in The Berkeley’s View [1]. IPA emerges from the Stephe...