نتایج جستجو برای: regulated cascode configuration

تعداد نتایج: 300152  

2013
R. Rezaei A. Ahmadpour M. N. Moghaddasi

This paper presents the design of an ultra low-voltage (ULV) pseudo operational transconductance amplifier (P-OTA) that is able to operate with a single supply voltage as low as 0.4 V. The proposed circuit is based on the bulk-driven technique and use of cross-coupled self-cascode pairs that boosts the differential DC gain. The stability condition of this structure for the DC gain is considered...

Journal: :ASM science journal 2022

This paper reviewed the efficiency of CMOS class AB power amplifier topology especially in gigahertz frequencies. is a compromise between A and B terms linearity 50% to 78.5%. However, cannot have good simultaneously due breakdown gate-oxide voltage effects from hot carrier. The oxide prevents optimum drain signal effect carrier will reduce quality overall PA design. Several works year 1999 201...

Journal: :IEEE Access 2023

This paper analyzes the main factors limiting bandwidth expansion of low-noise amplifiers (LNA) and designs a broadband LNA with 2-40.5 GHz. The is designed using multiple methods, including cascode, resistance feedback, cascode Darlington amplifier. amplitude-frequency characteristics principle three structures are studied theoretically based on small-signal equivalent circuit model. Thanks to...

2013
Ram Kumar Jitendra Mishra

In this paper presents a optimization of linearity of low noise amplifier by using post linearization techniques. in this technique we have used diode connected mosfet as IMD sinker also used interstage matching for gain enhancement and reducing the effect of nonlinearity in common gate stage of cascode amplifier, this has done by using UMC .18um CMOS Technology in cadence tool. We got gain 14d...

2008
J. Lintignat S. Barth P. Gamand

In this paper, two fully-differential low noise amplifiers based on classical cascode topologies are presented. The first one is enhanced with noise canceling technique and the second one is based on a negative feedback stage. These circuits have been designed to fulfill the lower band of SKA requirements with a 1.5 GHz bandwidth below 2 GHz. Both chips have been implemented using NXP QUBIC4G S...

2006
FRANZ SCHLÖGL HORST DIETRICH HORST ZIMMERMANN

In this paper we present a three-stage fully differential operational amplifier in 120nm digital CMOS. To reach high gain gain-boosted cascodes in the first stage are used. The gain-boost amplifiers are realized as two-stage amplifiers with self cascodes. A DC gain of 108dB and an unity-gain frequency of 1.06GHz are achieved at 1.2V supply. The operational amplifier is appropriate for supply vo...

2005
Wanlop Surakampontorn

A multi-output second generation current conveyor (MOCCII), that can be used to realized first, second and third generations current conveyors, is proposed. The MOCCII consists of a CMOS differential stage for the voltage input, push-pull stage and the improved cascode current mirrors for the current output. Feedback techniques are proposed in order to provide a voltage gain of 0.991, a current...

2006
HAMED ELSIMARY AHMED EL SHEIKH HAZEM H. ALI

Abstract: A CMOS LNA using MEMS Technology. Highlighting the "on-chip" inductors with quality factor used to replace previous off chip models. The operating frequency fo=2.4GHz with power dissipation of 20mW and overall noise figure of less than 1dB . It achieves an input return loss S11=-37.7dB. With a supply voltage of Vdd=2.7V giving out S21=24.3dB, S12= 40.7dB, and S22=-30dB. Cascode topolo...

1999
Bipul Agarwal Adele E. Schmitz J. J. Brown Mehran Matloubian Michael G. Case Mark J. W. Rodwell

We report traveling-wave amplifiers having 1–112 GHz bandwidth with 7 dB gain, and 1–157 GHz bandwidth with 5 dB gain. A third amplifier exhibited 5 dB gain and a 180GHz high-frequency cutoff. The amplifiers were fabricated in a 0.1m gate length InGaAs/InAlAs HEMT MIMIC technology. The use of gate-line capacitive-division, cascode gain cells and low-loss elevated coplanar waveguide lines have y...

2004
Antonio Vilches Rodney Loga Kostis Michelakis Kristel Fobelets Christos Papavasiliou David Haigh

A detailed introduction to published analogue circuit design techniques using Si and Si/SiGe FET devices for very low power applications is presented in this review. The topics discussed include subthreshold operation in FET devices, micro-currentmirrors and cascode techniques, voltage level-shifting and class-AB operation, the bulk-drive approach, the floating-gate method, micropower transcond...

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