We report on the characterization of single-photon avalanche diodes (SPADs) fabricated in standard 140-nm silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. As a methodology for SPAD optimization, a test structure array, called SPAD farm, was realized with several junctions, guard-ring structures, dimensions, etc. In this paper, characterization results of the...

This last decade silicon-on-insulator (SOI) MOSFET technology has demonstrated its potentialities for high frequency (reaching cutoff frequencies close to 500 GHz for n-MOSFETs) and for harsh environments (high temperature, radiation) commercial applications. For RF and system-onchip applications, SOI also presents the major advantage of providing high resistivity substrate capabilities, leadin...

This paper describes a method to model thin-film fully-depleted (FD) silicon-on-insulator (SOI) MOSFETs at frequencies where the quasi-static model is no longer valid. The method consists in considering a cascade of several elementary MOSFET transistors or sections and applying the quasi-static analysis to each section. Important second-order effects such as mobility degradation and velocity sa...

This letter describes the design, fabrication and characterization of high-Q oval resonators based on slot waveguide geometries in thin silicon-on-insulator material. Optical quality factors of up to 27 000 were measured in such filters, and we estimate losses of 210 dB/cm in the slotted waveguides on the basis of our resonator measurements. Such waveguides enable the concentration of light to ...

Structural quantum confinement in long-channel thin silicon-on-insulator MOSFETs has been quantified using the temperature dependence of the subthreshold current. The results were compared with the shifts in the threshold voltage. Data were obtained from simulations after initial verification with experimental data. This study demonstrates that, with the temperature dependence of the subthresho...

We present an integrated silicon Michelson interferometer for OCT fabricated with wafer scale deep UV lithography. Silicon waveguides of the interferometer are designed with GVD less than 50 ps/nm.km. The footprint of the device is 0.5 mm x 3 mm. The effect of sidewall roughness of silicon waveguides has been observed, possible solutions are discussed.

A novel bipolar transistor structure, namely, SiGe base lateral PNM Schottky Collector Bipolar Transistor (SCBT) in Silicon-On-Insulator (SOI) substrate is explored using two-dimensional (2-D) simulation. Based on a comparison with its equivalent PNP HBT, we demonstrate for the first time that the proposed SiGe base lateral PNM transistor exhibits a superior performance in terms of high current...

We have developed new silicon-on-insulator waveguide designs for simultaneously achieving both low-loss optical confinement and electrical contacts, and we present a design methodology based on calculating the Bloch modes of such segmented waveguides. With this formalism, waveguides are designed in a single thin layer of silicon-on-insulator to achieve both optical confinement and minimal inser...

Low temperature mobility measurements of silicon-on-insulator ~SOI! metal-oxidefield-effect-transistors are reported. The batch of devices fabricated in this work includes both ultrathin and thick devices for which the SOI film thicknesses are in the ranges of 10–15 nm and 56–61 nm, respectively. The 4.2 K peak mobility of the thick devices is 1.9 m/V s. The ultrathin devices show mobility degr...

Body Bias (BB) control on Silicon On Insulator (SOI) mitigates power consumption on the stand-by mode. However, Negative Bias Temperature Instability (NBTI) changes by BB. We measure the NBTI of ring oscillators on thin buried oxide (BOX) fully-depleted SOI process. NBTI is suppressed and power consumption becomes lower by applying Reverse BB (RBB) because larger threshold voltage decreases car...