In software testing, Failed Error Propagation (FEP) is the situation in which a faulty program state occurs during execution of system under test (SUT) but this does not lead to incorrect output. It known that FEP can adversely affect testing and has resulted associated information theoretic measures. To devise measures be used assess testability SUT. By testability, we mean how likely it state...

This research applies formal dataflow analysis and techniques to high-level DFT. Our proposed approach improves testability of the behavioral-level circuit description (such as in VHDL) based on propagation of the value ranges of variables through the circuit’s Control-Data Flow Graph (CDFG). The resulting testable circuit is accomplished via controllability and observability computations from ...

The paper describes an environment for an Internet-based co-operation in the field of design and test of digital systems. A VLSI design flow is combined with an Internetbased hierarchical automated test pattern generation (ATPG). A novel hierarchical ATPG driven by testability measures is presented. Both, the register-transfer (RT) and the gate level descriptions are used, and decision diagrams...

The Testability of Interaction-Driven Manufacturing Systems project seeks to enhance the design-fortestability of specifications for manufacturing software interfaces, derive a test method that is usable for interaction-driven manufacturing systems in general, and foster the reuse of testing artifacts. For our first testability study we constructed some prototype conformance and interoperabilit...

Testability analysis of VHDL sequential models is the main topic of this paper. We investigate the possibility to obtain information about the testability of a sequential VHDL description before its actual synthesis. The analysis is based on an implicit fault model that injects faults into a BDD based description extracted from the VHDL representation. Such an injection is related to the origin...

Frameworks are time-tested highly reusable architectural skeleton structures. They are designed ‘abstract’ and ‘incomplete’ and are designed with predefined points of variability, known as hot spots, to be customized later at the time of framework reuse. Frameworks are reusable entities thus demand stricter and rigorous testing in comparison to onetime use application. The overall cost of frame...

The testability of a software component is the ability of the software to reveal its faults. In the development of high reliability systems, testability is an important quality attribute for guiding architecture decisions. The reuse of assets in a software product line propagates defects as readily as correct code. The strategic levels of reuse in a product line produce a high level of inter-de...

Classical strategies in design for testability are applied at the gate-level, after the RT-logic synthesis process. New techniques covering test and synthesis (Test Synthesis) [1] are appearing but their application is mainly oriented to gate level (commercial tools such as Synopsys). On the other hand, most high-level synthesis tools do not take into account the testability of the final archit...

The rich collection of successes in property testing raises a natural question: Why are so many different properties turning out to be locally testable? Are there some broad “features” of properties that make them testable? Kaufman and Sudan (STOC 2008) proposed the study of the relationship between the invariances satisfied by a property and its testability. Particularly, they studied properti...

testability standard in the industry. Although its mandatory provisions focus narrowly on boardlevel assembly verification testing, primarily via the boundary-scan register, its test access port (TAP) and many optional provisions make the standard usable for a much broader range of applications. Since its inception, numerous extensions and applications have been proposed that allow the standard...