This paper presents a way to enhance the Differential Current-Switch Threshold Logic gate (DCSTL) in order to allow the gate to perform more complex functions. This enhancement is achieved by replacing the MOS-transistors at the dataand threshold mapping bank of the DCSTL gate with neuronMOS transisors. First, we introduce the neuronMOS-enhanced DCSTL gate. Then, the results of HSPICE simulatio...

This paper discusses the effects of MOSFET threshold voltage variations on the reliability of nanometer-scale CMOS logic gates. The reliability is quantified in terms of the probability-of-failure of individual CMOS gates, which is obtained from extensive Monte Carlo simulations of these gates. The study considers different nano-scale CMOS technology generations and compares the effect of thres...

In a previous paper, the authors defined a new class ofmultiple-valued logic functions, called multiple-valued majority func-tions. This correspondence clarifies the distinction of multiple-valuedmajority functions from multiple-valued threshold functions through thedifference between a number function and an inner product of an inputvector and a weight vector. Zndcx Terns-I...

By a combination of graphene oxide and DNA, a universal platform was developed for integration of multiple logic gates to implement both half adder and half subtractor functions. A constant undefined threshold range between high and low fluorescence output signals was set for all the developed logic gates.