The newly introduced Microprocessor Architecture for Java Computing (MAJC) supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruction level parallelism via a very long instruction word architecture (VLIW) and SIMD. The rst implementation, MAJC-5200, includes some key features of MAJC to realize a high performance multimedia processor. Two CPUs r...

Most of modern embedded systems for multimedia and network applications are based on parallel data stream processing. The data processing can be done using very long instruction word processors (VLIW), or using more than one high performance application-specific instruction set processor (ASIPs), or even by their combination on single chip. Design and testing of these complex systems is time-co...

To my father and all other members of my family Summary In this dissertation, we propose to combine programmability with reconfig-urability by implementing an adaptable programmable VLIW processor in a reconfigurable hardware. The approach allows applications to be developed at high-level (C language level), while at the same time, the processor organization can be adapted to the specific requi...

Code compression is an important issue in the design of an embedded system, since memory has been one of the most restricted resources. Most of the previous work in code compression has targeted RISC architectures, although VLIW processors have gained a lot of popularity recently. In this research, we explore methods to the problem of compressing code for VLIW processors. Previous code compress...

We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processor scales with the size of the input blocks varying from 7 cycles for an 1x1 block to 38 cycles for an 8x8 block. This scalability is possible because the processor has input data dependant control by which it can explo...

Bioinformatics applications represent the increasingly important workloads. Their characteristics and implications on the underlying hardware design, however, are largely unknown. Currently, biological data processing ubiquitously relies on the high-end systems equipped with expensive, generalpurpose processors. The future generation of bioinformatics requires the more flexible and cost-effecti...

The secure transmission of data plays a significant role in todays information era. Especially in the area of public-key-cryptography methods, which are based on elliptic curves (ECC), gain more and more importance. Compared to asymmetric algorithms, like RSA, ECC can be used with shorter key lengths, while achieving an equal level of security. The performance of ECC-algorithms can be increased...

Embedded processors developed within the past few years have employed novel hardware designs to reduce the ever-growing complexity, power dissipation, and die area. Although using a distributed register file architecture is considered to have less read/write ports than using traditional unified register file structures, it presents challenges in compilation techniques to generate efficient code...

In this study, a fault-tolerant design framework of VLIW processor is proposed. Specifically, this paper concentrates on the issue of dependable data path design. We first use three identical functional modules in the data paths to demonstrate our fault-tolerant technique. Basically, we add one spare module in this illustration and refine on the concepts of triple modular redundancy and compari...