نتایج جستجو برای: asynchronous sequential logic

تعداد نتایج: 254650  

2006
Gabriel Aguilera Venegas Alfredo Burrieza Pablo Cordero Inmaculada Perez de Guzmán Emilio Muñoz-Velasco

In this paper, the Multi-flow Asynchronous Temporal Logic, called MAT Logic, is presented. MAT Logic is a new temporal×modal logic with non-deterministic operators among time flows as accessibility relations. The main goal of this work has been the design and description of a logic that could be capable of managing communications among systems with not necessarily synchronizable time flows. In ...

Journal: :CoRR 2017
P. Balasubramanian

This paper comments on “Asynchronous Logic Implementation Based on Factorized DIMS” [Jour. of Circuits, Systems, and Computers, vol. 26, no. 5, 1750087, pages 9, May 2017] with respect to two problematic issues: i) the gate orphan problem implicit in the factorized DIMS approach discussed in the referenced article which affects the strong-indication, and ii) how the enumeration of product terms...

1994
Stephen B. Furber Paul Day Jim D. Garside Nigel C. Paver John V. Woods

A fully asynchronous implementation of the ARM microprocessor has been developed in order to investigate the potential of asynchronous logic for low-power applications. The work demonstrates the feasibility of complex asynchronous design and shows that the cost and performance characteristics are similar to clocked designs. AMULET1 is the first attempt at applying asynchronous techniques to a d...

Journal: :CoRR 2017
Robert D. Young

Two-player games have had a long and fruitful history of applications stretching across the social, biological, and physical sciences. Most applications of two-player games assume synchronous decisions or moves even when the games are iterated. But different strategies may emerge as preferred when the decisions or moves are sequential, or the games are iterated. Zero-determinant strategies deve...

2012
Uri Klein Nir Piterman Amir Pnueli

We consider automatic synthesis from linear temporal logic specifications for asynchronous systems. We aim the produced reactive systems to be used as software in a multi-threaded environment. We extend previous reduction of asynchronous synthesis to synchronous synthesis to the setting of multiple input and multiple output variables. Much like synthesis for synchronous designs, this solution i...

2010
Andrew H. Fagg

Digital logic circuits composed of components such as AND, OR and NOT gates and that do not contain loops are what we refer to as stateless. In other words, the output that the circuit produces only depends on the current inputs, and does not depend on any previous inputs. These types of circuits are also referred to as combinatorial circuits. However, as we design computing systems, we have a ...

Journal: :CoRR 2016
Bin Gu Zhouyuan Huo Heng Huang

Zeroth-order (derivative-free) optimization attracts a lot of attention in machine learning, because explicit gradient calculations may be computationally expensive or infeasible. To handle large scale problems both in volume and dimension, recently asynchronous doubly stochastic zeroth-order algorithms were proposed. The convergence rate of existing asynchronous doubly stochastic zeroth order ...

2015
Ivan Gavran Filip Niksic Aditya Kanade Rupak Majumdar Viktor Vafeiadis

Asynchronous programming has become ubiquitous in smartphone and web application development, as well as in the development of server-side and system applications. Many of the uses of asynchrony can be modeled by extending programming languages with asynchronous procedure calls—procedures not executed immediately, but stored and selected for execution at a later point by a non-deterministic sch...

2000
Radu Grosu

Sequential and parallel composition are the most fundamental operators for incremental construction of complex concurrent systems. They reflect the temporal and respectively the spatial properties of these systems. Hiding temporal detail like internal computation steps supports temporal scalability and may turn an asynchronous system to a synchronous one. Hiding spatial detail like internal var...

Journal: :CoRR 2017
P. Balasubramanian K. Prasad

Asynchronous circuits employing delay-insensitive codes for data representation i.e. encoding and following a 4-phase return-to-zero protocol for handshaking are generally robust. Depending upon whether a single delay-insensitive code or multiple delay-insensitive code(s) are used for data encoding, the encoding scheme is called homogeneous or heterogeneous delay-insensitive data encoding. This...

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