We consider a user communicating over a fading channel with perfect channel state information. Data is assumed to arrive from some higher layer application and is stored in a buffer until it is transmitted. We study adapting the user’s transmission rate and power based on the channel state information as well as the buffer occupancy; the objectives are to regulate both the long-term average tra...

Due to random delay variations in current best effort networks, packet video applications rely on end-system buffering and playout adaptation to reduce the effects of disruptions on the required smooth stream presentation. To study the effect of buffering and playout adaptation, we present an analytical model based on the M/G/1 queueing system with finite buffer capacity and traffic intensity e...

The aim of this study was to establish effect of 14 day consumption of commercially available yoghurt containing Lactobacillus rhamnosus ATCC53103 - LGG (Bioaktiv LGG, Dukat, Croatia) on Streptococcus mutans and Lactobacillus spp. salivary counts in children. Twenty five patients, 6-10 yr old participated in the study. At the inclusion in the study caries risk for every patient was evaluated. T...

In this paper, we study virtual full-duplex (FD) buffer-aided relaying to recover the multiplexing loss of halfduplex (HD) relaying in a network with multiple buffer-aided relays, each of which has multiple antennas, through opportunistic relay selection and beamforming. The main idea of virtual FD buffer-aided relaying is that a source and a relay simultaneously transmit their own information ...

The calyx of Held, a specialized synaptic terminal in the medial nucleus of the trapezoid body, undergoes a series of changes during postnatal development that prepares this synapse for reliable high frequency firing. These changes reduce short-term synaptic depression during tetanic stimulation and thereby prevent action potential failures during a stimulus train. We measured presynaptic membr...

In this paper several methods to use eDRAM (embedded DRAM, on-chip DRAM) in packet switches are analyzed. A practical method using eDRAM as an output queue is proposed especially in a shared bus packet switch. In the newly proposed output buffer architecture, hierarchical output buffer (HOB), of SRAM plays a role of the small FIFO buffer between a high-speed shared bus and a large eDRAM output ...

Given the strict Quality of Service (QoS) requirements of video streaming, this paper proposes a novel solution for simultaneous streaming of multiple video sessions over a mobile cellular system. The proposed solution combines a buffer management strategy with a packet scheduling algorithm. The buffer management strategy selectively discards packets of a user from base station buffer whereas t...

All packet switches contain packet buffers to hold packets during times of congestion. The capacity of a high performance router is often dictated by the speed of its packet buffers. Highspeed routers rely on well-designed packet buffers that support multiple queues, provide large capacity and short response times. Some researchers suggested combined SRAM/DRAM hierarchical buffer architectures ...

The notion of effective bandwidths has provided a useful practical framework for connection admission control and capacity planning in high-speed communication networks. The associated admissible set with a single linear boundary makes it possible to apply stochastic-loss-network (generalized-Erlang) models for capacity planning. In this paper we consider the case of network nodes that use a pr...