نتایج جستجو برای: clock tree construction

تعداد نتایج: 417096  

Journal: :IEEE Communications Letters 2007

Journal: :RAIRO - Theoretical Informatics and Applications 2011

Journal: :Journal of Communication and Information Systems 1999

2013
Martin Sumak Peter Gurský

We present a new spatial index belonging to R-tree family. Since our new index comes out from the R-tree and holds the concept of nonoverlapping nodes we call it R-tree. The original R-tree was designed for both point and spatial data. Using R-tree for indexing spatial data is very inefficient. In our research we face the problem of indexing product catalogues data that can be represented as po...

1994
Chung-Wei Ku Liang-Gee Chen Tzi-Dar Chiueh Her-Ming Jong

A tree-structure based architecture for vector quantization (VQ) is proposed and implemented by VLSI in this paper. The proposed folded-tree architecture is designed by 0.8 m CMOS VLSI technology. The die size is 4.65 5.21 mm 2 and estimated clock rate is about 34MHz, which satis es most real-time applications. Since it is basically a mean squared error computation circuit, various kinds of VQ ...

Although water and land pollution are very dangerous, air pollution has its own peculiarities due to its transboundary dispersion of pollutants over the entire world. In any well planned urban set up, industrial pollution takes a back seat and vehicular emissions take precedence as the major cause of urban air pollution. In the present study, Air pollution tolerance index was calculated for var...

Journal: :Bioinformatics 2009
Lin Himmelmann Dirk Metzler

MOTIVATION For the estimation of phylogenetic trees from molecular data, it is worthwhile to take prior paleontologic knowledge into account, if available. To calibrate the branch lengths of the tree with times assigned to geo-historical events or fossils, it is necessary to select a relaxed molecular clock model to specify how mutation rates can change along the phylogeny. RESULTS We present...

2010
Kuo-Ken Huang David D. Wentzloff

This paper presents a design method of on-chip patch antenna integration in a standard CMOS technology without post processing. A 60 GHz on-chip patch antenna is designed utilizing the top metal layer and an intermediate metal layer as the patch and ground plane, respectively. Interference between the patch and digital baseband circuits located beneath the ground plane is analyzed. The 60 GHz o...

2003

s92,1 15363,1980.search, April 1981. 59. “Recyclers Beat the Clock.” Engineering News Record,November 6,1980. 60. “D-Cracked Concrete Pavement Recycled for Less.” Highway andHeavy Construction, April 1981. 61. “Asphalt Pavement Milled and Recycled on Same Project.” Highway and Heavy Construction, August1981. 62. “In Place Recycling Cuts Paving Cost, Time.” Highwa...

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