A new configuration realizing water quality monitoring device using ISFET involving CMOS differential voltage current conveyor (DVCC) based low pass filter free from trans-conductance variation using Low-voltage PMOS bulkdriven cascade current mirror (P MOS BDCCM) current mirrors is proposed. The circuit uses four DVCCs as active elements and together with two capacitors and five resistors as p...

This paper presents a frequency modulation based readout circuit for the measurement of skin conductance or resistance. A charge pump based frequency-to-voltage converter circuit with adjustable sensitivity is used to convert the frequency shifts due to skin resistance changes into voltage variations. The readout circuit improves the measurement accuracy and artifact rejection in measurements o...

This work presents the implementation of multidimensional membership functions by means of an analogue Neuro-Fuzzy circuit realized in 0.8μm CMOS technology. The adopted circuit configuration is discussed and preliminary measurements of an integrated circuit prototype are reported. 1 Circuit implementation The fuzzy system model used in this work is based on the so-called fuzzy if-then rules [1...

We propose an architecture and circuit for temperature sensors integrated within systems on a chip. The circuit is based on special properties of devices when biased by a current with a particular dependence with temperature. We present results from a test circuit fabricated on a standard 0.8 μm CMOS technology which draws under 40 nA from a 1.6 V to 3.0 V supply at room temperature. Measuremen...

This dissertation focuses on the implementation of integrating pulse transmitter with wide-band antenna array into a chip by CMOS process for beam-forming in millimeter-wave (mm-wave) active imaging applications. Integrated antenna arrays in this research electrically control and steer radiated-pulse beams towards objects to be imaged. Among imaging approaches, active imaging method provides mo...

The smart integrated systems of tomorrow would demand a combination of micromechanical components and traditional electronics. On-chip solutions will be the ultimate goal. One way of making such systems is to implement the mechanical parts in an ordinary CMOS process. This procedure has been used to design an oscillator consisting of a resonating cantilever beam and a CMOS Pierce feedback ampli...

Power reduction is one of the biggest challenges in CMOS integrated circuit design. Optimization of power is inevitable in order to reduce package cost and extended battery life. As a switch tri-modal MTCMOS (Multi Threshold CMOS switch) can be considered as a low power solution for data retentive power gating applications. In MTCMOS, transistors with multiple threshold voltages are used in ord...

A low-cost, compact 5-Gbps fully integrated CMOS optical receiver without equalizer is fabricated in this paper in a standard 0.18-μm CMOS technology. The measured responsivity of the DNW-strip-SMPD operating in avalanche mode is 1.4A/W, while the bandwidth is 2.9GHz with 11.6V reverse bias voltage. The application for 5-Gbps very-short-reach optoelectronic integrated circuit (OEIC) receiver wi...

We present an alternative post-processing on a CMOS chip to release a planar microelectrode array (pMEA) integrated with its signal readout circuit, which can be used for monitoring the neuronal activity of vestibular ganglion neurons in newborn Wistar strain rats. This chip is fabricated through a 0.6 μm CMOS standard process and it has 12 pMEA through a 4 × 3 electrodes matrix. The alternativ...

An electronic nose (E-Nose) is one of the applications for surface acoustic wave (SAW) sensors. In this paper, we present a low-noise complementary metal-oxide-semiconductor (CMOS) readout application-specific integrated circuit (ASIC) based on an SAW sensor array for achieving a miniature E-Nose. The center frequency of the SAW sensors was measured to be approximately 114 MHz. Because of inter...