Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the design of Multi-Terabit optical Local Area Networks. This paper describes the design of an integrated optoelectronic CMOS crossbar switch to interconnect approx. 128 parallel fiber ribbon optical links, each with 12 ch...

In this work we study the feasibility to obtain the smallest CMOS-NEMS resonator using a sub-100 nm CMOS technology. The NEMS resonators are defined in a top-down approach using the available layers of the 65 nm CMOS technology from ST Microelectronics. A combination of dry and wet etching is developed in order to release the NEMS in an in-house post-CMOS process. Two different NEMS resonators ...

In this paper, architectures for low-noise high-speed image sensors based on 3D stacking technology are discussed. Effectiveness of the 3D-stacking technology for low-noise high-speed image sensors is demonstrated in an implementation of a 33Mpixel 240fps 3D-stacked CMOS image sensor based on 12b 3-stage cyclic-based pipelined ADCs. For extremely low noise and wide dynamic range imaging, highly...

An ultra-wideband mixer using standard complementery metal oxide semiconductor (CMOS) technology was first proposed in this paper. This broadband mixer achieves measured conversion gain of 11 1 5 dB with a bandwidth of 0.3 to 25 GHz. The mixer was fabricated in a commercial 0.18m CMOS technology and demonstrated the highest frequency and bandwidth of operation. It also presented better gain-ban...

Traditionally, multiple IC chips are needed to build transmitters (Tx) used in wireless communications. The difficulty with a full Tx integration is that each Tx building block uses different technology. A power-detection circuit will exploit the Schottky diode, while the modulator IC is integrated with BiCMOS or SiGe. Likewise, the digital control loop is implemented in CMOS. Now that directco...

This paper describes analog/mixed-signal circuit design in the nano CMOS era. Digitally-assisted analog technology is becoming more important, and as an example, our fully digital FPGA implementation of a TDC with self-calibration is shown. Since pure analog circuits are still present and “good” device modeling is required for their designs, device modeling technology for nano CMOS with complic...

A high performance FGMOS based current mirrors at low supply voltage is proposed in this paper. A combination of floating gate and CMOS technology is used to design this new simple current mirror at low supply voltage of 0.5V using 180nm CMOS technology. Very low input impedance of 14Ω with increased input voltage swing. In addition to accurate current copy, a very high output impedance of 5GΩ ...

The downscaling of CMOS technology gives rise to a myriad of nanoscale effects. At the same time, power density and thus heat generation increases. The aim of this paper is to evaluate the feasibility of both analogue and digital temperature sensors in nanoscale CMOS using the Berkeley Predictive Technology Model (BPTM) for 65nm. For the oscillator-based digital sensor presented, a sensitivity ...

Article history: Available online 21 May 2008 The review of this paper was arranged by Jurriaan Schmitz 0038-1101/$ see front matter 2008 Elsevier Ltd. A doi:10.1016/j.sse.2008.04.012 * Address: Delft University of Technology, Mekel Netherlands. E-mail addresses: [email protected] This paper gives an overview of the state-of-the-art of CMOS image sensors. The main focus is put on ...

A novel electrostatic discharge (ESD) protection device with a threshold voltage of 0V for complementary metal-oxide semiconductor (CMOS) integrated circuits in sub-quarter-micron CMOS technology is proposed. Quite different to the traditional ESD protection devices, such an active ESD device is originally standing in its turn-on state when the IC is zapped under ESD events. Therefore, such an ...