In this paper we present a methodology for the simulation of continuous-time sigma-delta converters. This method, based on a fixed-step algorithm, permits not only a time-domain simulation of the modulator output but also the simulation of intermediary signals. The method is based on the discretization of the continuous-time models and the use of a discrete simulator such as Simulink, which is ...

Delta-sigma modulation has become popular in modern analog-to-digital (AD) modulator design due to their relatively high immunity to process variations. In this paper, we propose efficient characterization techniques to obtain the key performance parameters of the 1-bit first-order deltasigma modulator which is intended to be used as an on-chip analog signal digitizer for BIST (built-in self-te...

This paper discusses design considerations for cascade Sigma-Delta Modulators (Σ∆Ms) included in multistandard wireless receivers. Four different standards are covered: GSM, Bluetooth, UMTS, and WLAN. A top-down design methodology is proposed to find out the optimum modulator architecture in terms of circuit complexity and reconfiguration parameters. Several reconfiguration strategies are adopt...

A MASH digital delta–sigma modulator (DDSM) is analyzed mathematically. It incorporates first-order error feedback modulators (EFM) which include prime modulus quantizers to guarantee a minimum sequence length . The purpose of this analysis is to calculate the exact sequence length of the aforementioned MASH DDSM. We show that the sequence length for an th-order member of this modulator family ...

An enhanced version of Sturdy MASH (SMASH) [2] delta-sigma modulator is proposed. This structure takes advantage of the well-known stability of the MASH structure while greatly reducing its sensitivity to imperfect circuit blocks. Furthermore, no digital noise cancellation filters are needed. Hence there is no matching requirement for the analog and digital paths. With the proposed enhancement ...