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this paper presents a modified 32-bit rom-based direct digital frequency synthesizer (ddfs). maximum output frequency of the ddfs is limited by the structure of the accumulator used in the ddfs architecture. the hierarchical pipeline accumulator (hpa) presented in this paper has less propagation delay time rather than the conventional structures. therefore, it results in both higher maximum ope...

A digital-to-analog converter system compliant with the requirements of software radio transmission interfaces is presented. The system, through a proper combination of interpolation, digital filtering and data conversion allows us to relax the speed requirements of the analog and the digital section while fully satisfying the specifications. A design example and high level simulation results a...

In this paper, we propose an all-digital frequency synthesizer architecture, based on an all-digital Σ∆-frequency discriminator. The new all-digital synthesizer is compared to previously published work. The architecture of the Σ∆frequency discriminator is verified using behavioral simulation.

An integrated laboratory for system modeling, simulation, real-time digital signal processing, and control is being developed at Bucknell University for undergraduate electrical engineering education. The laboratory bridges the gap between software simulation and testing of actual systems through a common visual programming interface. Students can explore the iterative process of developing a m...

Hardware in the loop (HIL) simulation based on modern digital signal processors is a coste€ective technology for the design and evaluation of various sophisticated weapon and industrial systems. In this article a HIL simulation is presented through the very complex problem of modernisation of the semi-automatic command to line of sight (SACLOS) missile system. The presented examples illustrate ...

This paper presents a review of phase locked loop (PLL) techniques. The different types of phase detector, loop filter and oscillators are discussed. It alleviates the problems associated with the classical analog PLL. Linear PLL, Digital PLL and All digital PLL models are implemented in Simulink Simulation results in Simulink gives the performance overview of the three types of PLL. Keywords— ...

The paper presents a new method for multivalued simulation of digital circuits based on calculation of Boolean derivatives on BDDs (or structural alternative graphs). A procedure for calculation of maximums of Boolean derivatives as the basis of multivalued simulation is given. The method is applicable for component level representations of digital circuits where as components arbitrary subcirc...